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AM29F400BT-50EF 参数 Datasheet PDF下载

AM29F400BT-50EF图片预览
型号: AM29F400BT-50EF
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash, 256KX16, 50ns, PDSO48, LEAD FREE, MO-142BDD, TSOP-48]
分类和应用: 光电二极管内存集成电路
文件页数/大小: 43 页 / 860 K
品牌: CYPRESS [ CYPRESS ]
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D A T A S H E E T  
Table 5. Am29F400B Command Definitions  
Bus Cycles (Notes 2–5)  
Command  
Sequence  
(Note 1)  
First  
Second  
Third  
Addr  
Fourth  
Fifth  
Sixth  
Addr Data Addr Data  
Data Addr Data Addr Data Addr Data  
Read (Note 6)  
Reset (Note 7)  
1
1
RA  
XXX  
555  
RD  
F0  
Word  
Byte  
Word  
Byte  
Word  
Byte  
2AA  
555  
2AA  
555  
2AA  
555  
555  
AAA  
555  
Manufacturer ID  
4
4
4
AA  
AA  
AA  
55  
55  
55  
90  
90  
90  
X00  
01  
AAA  
555  
X01  
X02  
2223  
23  
Device ID,  
Top Boot Block  
AAA  
555  
AAA  
555  
X01 22AB  
Device ID,  
Bottom Boot Block  
AAA  
AAA  
X02  
AB  
XX00  
XX01  
00  
(SA)  
X02  
Word  
Byte  
555  
2AA  
555  
555  
Sector Protect Verify  
(Note 9)  
4
AA  
55  
90  
(SA)  
X04  
AAA  
AAA  
01  
Word  
Byte  
Word  
Byte  
Word  
Byte  
555  
AAA  
555  
2AA  
555  
2AA  
555  
2AA  
555  
555  
AAA  
555  
Program  
4
6
6
AA  
AA  
AA  
55  
55  
55  
A0  
80  
80  
PA  
PD  
AA  
AA  
555  
AAA  
555  
2AA  
555  
2AA  
555  
555  
Chip Erase  
55  
55  
10  
30  
AAA  
555  
AAA  
555  
AAA  
Sector Erase  
SA  
AAA  
XXX  
XXX  
AAA  
AAA  
Erase Suspend (Note 10)  
Erase Resume (Note 11)  
1
1
B0  
30  
Legend:  
X = Don’t care  
PD = Data to be programmed at location PA. Data latches on the  
rising edge of WE# or CE# pulse, whichever happens first.  
RA = Address of the memory location to be read.  
SA = Address of the sector to be verified (in autoselect mode) or  
erased. Address bits A17–A12 uniquely select any sector.  
RD = Data read from location RA during read operation.  
PA = Address of the memory location to be programmed.  
Addresses latch on the falling edge of the WE# or CE# pulse,  
whichever happens later.  
Notes:  
1. See Table 1 for description of bus operations.  
8. The fourth cycle of the autoselect command sequence is a  
read cycle.  
2. All values are in hexadecimal.  
9. The data is 00h for an unprotected sector and 01h for a  
protected sector. See“Autoselect Command Sequence” for  
more information.  
3. Except when reading array or autoselect data, all bus cycles  
are write operations.  
4. Data bits DQ15–DQ8 are don’t cares for unlock and  
command cycles.  
10. The system may read and program in non-erasing sectors, or  
enter the autoselect mode, when in the Erase Suspend  
mode. The Erase Suspend command is valid only during a  
sector erase operation.  
5. Address bits A17–A11 are don’t cares for unlock and  
command cycles, unless PA or SA required.  
6. No unlock or command cycles required when reading array  
data.  
11. The Erase Resume command is valid only during the Erase  
Suspend mode.  
7. The Reset command is required to return to reading array  
data when device is in the autoselect mode, or if DQ5 goes  
high (while the device is providing status data).  
November 11, 2009 21505E8  
Am29F400B  
17