CY7C192
Switching Characteristics
Over the Operating Range
[6]
7C192-12
Parameter
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE
t
LZCE
t
HZCE
t
PU
t
PD
Read Cycle Time
Address to Data Valid
Output Hold from
Address Change
CE LOW to
Data Valid
CE LOW to
Low Z
[7]
CE HIGH to
High Z
[7,8]
CE LOW to
Power-Up
CE HIGH to
Power-Down
Write Cycle Time
CE LOW to
Write End
Address Set-Up to
Write End
Address Hold from
Write End
Address Set-Up to
Write Start
WE Pulse Width
Data Set-Up to
Write End
Data Hold from
Write End
WE HIGH to
Low Z (7C192)
[7]
WE LOW to
High Z (7C192)
[7,8]
WE LOW to Data Valid
(7C191)
Data Valid to
Output Valid (7C191)
CE LOW to Data Valid
(7C191)
12
9
9
0
0
8
8
0
3
7
12
12
12
0
12
3
5
0
15
3
12
3
7
0
20
12
12
3
15
3
9
0
25
15
15
3
20
3
11
20
20
3
25
25
25
ns
ns
ns
ns
ns
ns
ns
ns
Description
Min.
Max.
7C192-15
Min.
Max.
7C192-20
Min.
Max.
7C192-25
Min.
Max.
Unit
WRITE CYCLE
[9]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
t
DWE
t
ADV
t
DCE
15
10
10
0
0
9
9
0
3
7
15
15
15
20
15
15
0
0
15
10
0
3
10
20
20
20
25
18
20
0
0
18
10
0
3
11
25
20
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
6. Test conditions assume signal transition time of 3 ns or less for -12 and -15 speeds and 5 ns or less for -20 through -25 speeds, timing reference levels of
1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I
OL
/I
OH
and 30-pF load capacitance.
7. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZWE
is less than t
LZWE
for any given device. These parameters are guaranteed by
design and not 100% tested.
8. t
HZCE
and t
HZWE
are specified with C
L
= 5 pF as in part (b) of AC Test Loads. Transition is measured
±
500 mV from steady-state voltage.
9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
Document #: 38-05047 Rev. **
Page 4 of 10
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