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7C1351-66 参数 Datasheet PDF下载

7C1351-66图片预览
型号: 7C1351-66
PDF下载: 下载PDF文件 查看货源
内容描述: 128Kx36流通型SRAM与NOBL TM架构 [128Kx36 Flow-Through SRAM with NoBL TM Architecture]
分类和应用: 静态存储器
文件页数/大小: 13 页 / 185 K
品牌: CYPRESS [ CYPRESS ]
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CY7C1351  
Current into Outputs (LOW)......................................... 20 mA  
Maximum Ratings  
Static Discharge Voltage .......................................... >2001V  
(per MIL-STD-883, Method 3015)  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Latch-Up Current.................................................... >200 mA  
Storage Temperature ..................................... −65°C to +150°C  
Ambient Temperature with  
Power Applied.................................................. −55°C to +125°C  
Operating Range  
Ambient  
Supply Voltage on V Relative to GND.........0.5V to +4.6V  
[8]  
DD  
Range  
Coml  
Temperature  
V
/V  
DD DDQ  
DC Voltage Applied to Outputs  
[7]  
0°C to +70°C  
3.3V ± 5%  
in High Z State .....................................0.5V to V  
+ 0.5V  
+ 0.5V  
DDQ  
DDQ  
[7]  
DC Input Voltage ..................................0.5V to V  
Electrical Characteristics Over the Operating Range  
Parameter  
Description  
Test Conditions  
Min.  
3.135  
3.135  
2.4  
Max.  
3.465  
3.465  
Unit  
V
Power Supply Voltage  
I/O Supply Voltage  
Output HIGH Voltage  
Output LOW Voltage  
Input HIGH Voltage  
V
V
V
V
V
DD  
V
DDQ  
[9]  
V
V
V
= Min., I = 4.0 mA  
OH  
OH  
DD  
DD  
[9]  
V
= Min., I = 8.0 mA  
0.4  
OL  
OL  
V
2.0  
V
+
DD  
IH  
0.3V  
0.8  
5
[7]  
V
Input LOW Voltage  
0.3  
5  
V
IL  
I
Input Load Current  
GND V V  
mA  
mA  
mA  
X
I
DDQ  
Input Current of MODE  
30  
5  
30  
5
I
I
Output Leakage  
Current  
GND V V  
Output Disabled  
OZ  
I
DDQ,  
V
Operating Supply  
V
f = f  
= Max., I  
= 0 mA,  
15-ns cycle, 66 MHz  
20-ns cycle, 50 MHz  
25-ns cycle, 40 MHz  
15-ns cycle, 66 MHz  
20-ns cycle, 50 MHz  
25-ns cycle, 40 MHz  
All speed grades  
250  
200  
175  
60  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
CC  
DD  
DD  
OUT  
CYC  
= 1/t  
MAX  
I
Automatic CE  
Power-Down  
Max. V , Device Deselected,  
DD  
SB1  
V
V or V V  
IN  
IH  
IN  
IL  
40  
CurrentTTL Inputs  
f = f  
= 1/t  
MAX CYC  
35  
I
I
Automatic CE  
Power-Down  
CurrentCMOS  
Inputs  
Max. V , Device Deselected,  
5
SB2  
DD  
V
0.3V or V > V  
0.3V,  
IN  
IN  
DDQ  
f =0  
Automatic CE  
Power-Down  
CurrentCMOS  
Inputs  
Max. V , Device Deselected, or 15-ns cycle, 66 MHz  
50  
40  
35  
mA  
mA  
mA  
SB3  
DD  
V
f = f  
0.3V or V > V  
0.3V  
DDQ  
IN  
IN  
CYC  
20-ns cycle, 50 MHz  
25-ns cycle, 40 MHz  
= 1/t  
MAX  
Notes:  
7. Minimum voltage equals 2.0V for pulse duration less than 20 ns.  
8. A is the case temperature.  
T
9. The load used for VOH and VOL testing is shown in figure (b) of the AC Test Loads.  
7
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