Ultra37000 CPLD Family
Logic Block Diagrams (continued)
TDI
JTAG Tap
CY37128/CY37128V
CLOCK
INPUTS
TCK
TMS
TDO
INPUTS
1
Controller
4
INPUT/CLOCK
MACROCELLS
JTAG
EN
INPUT
MACROCELL
4
4
16 I/Os
LOGIC
BLOCK
A
LOGIC
BLOCK
H
16 I/Os
I/O0–I/O15
36
16
36
16
I/O112–I/O127
I/O96–I/O111
I/O80–I/O95
I/O64–I/O79
PIM
LOGIC
BLOCK
B
LOGIC
BLOCK
G
16 I/Os
16 I/Os
16 I/Os
36
16
36
16
I/O16–I/O31
16 I/Os
LOGIC
BLOCK
C
LOGIC
BLOCK
F
36
16
36
16
I/O32–I/O47
16 I/Os
LOGIC
BLOCK
D
LOGIC
BLOCK
E
16 I/Os
36
16
36
16
I/O28–I/O63
64
64
Clock/
Input
CY37192/CY37192V
Input
4
1
4
4
36
36
LOGIC
LOGIC
BLOCK
L
10 I/Os
I/O –I/O
10 I/Os
9
BLOCK
A
16
36
16
36
16
36
I/O –I/O
110
119
0
10 I/Os
I/O –I/O
10 I/Os
LOGIC
BLOCK
B
LOGIC
BLOCK
K
16
36
16
36
16
I/O –I/O
10
100
109
19
10 I/Os
I/O –I/O
10 I/Os
LOGIC
BLOCK
C
LOGIC
BLOCK
J
I/O –I/O
20
16
36
16
36
16
90
99
29
PIM
10 I/Os
I/O –I/O
10 I/Os
39
LOGIC
BLOCK
D
LOGIC
BLOCK
I
I/O –I/O
30
80
89
36
16
36
10 I/Os
I/O –I/O
10 I/Os
49
LOGIC
BLOCK
E
LOGIC
BLOCK
H
I/O –I/O
40
70
79
69
36
16
10 I/Os
I/O –I/O
10 I/Os
LOGIC
BLOCK
F
LOGIC
BLOCK
G
I/O –I/O
50
16
60
59
60
60
TDI
TCK
TMS
JTAG Tap
Controller
TDO
Document #: 38-03007 Rev. *E
Page 10 of 64
CYPRESS [ CYPRESS ]
