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C450TR3050-S3600 参数 Datasheet PDF下载

C450TR3050-S3600图片预览
型号: C450TR3050-S3600
PDF下载: 下载PDF文件 查看货源
内容描述: [Low Forward Voltage - 2.95 V Typical at 20 mA]
分类和应用:
文件页数/大小: 5 页 / 298 K
品牌: CREE [ CREE, INC ]
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Maximum Ratings at TA = 25°CNotes 1&3  
DCꢀForwardꢀCurrent  
CxxxTR3050-Sxx00  
70ꢀmA  
PeakꢀForwardꢀCurrentꢀ(1/10ꢀdutyꢀcycleꢀ@ꢀ1ꢀkHz)  
LEDꢀJunctionꢀTemperature  
100ꢀmA  
125°C  
ReverseꢀVoltage  
5ꢀV  
OperatingꢀTemperatureꢀRange  
-40°Cꢀtoꢀ+100°C  
-40°Cꢀtoꢀ+120°C  
≤30°Cꢀ/ꢀ≤85%ꢀRH  
1000ꢀV  
LEDꢀChipꢀStorageꢀTemperature  
RecommendedꢀDieꢀSheetꢀStorageꢀConditions  
ElectrostaticꢀDischargeꢀThresholdꢀ(HBM)ꢀNoteꢀ2  
ElectrostaticꢀDischargeꢀClassificationꢀ(MIL-STD-883E)ꢀNoteꢀ2  
Classꢀ2  
Note 3  
Typical Electrical/Optical Characteristics at TA = 25°C, If = 20 mA  
Reverse Current  
[I(Vr=5V), μA]  
Full Width Half Max  
Part Number  
Forward Voltage (Vf, V)  
(λD, nm)  
Min.  
Typ.  
2.95  
2.95  
Max.  
Max.  
Typ.  
20  
C450TR3050-Sxx00  
C460TR3050-Sxx00  
2.7  
2.7  
3.4  
3.4  
2
2
21  
Mechanical Specifications  
Description  
CxxxTR3050-Sxx00  
Dimension  
Tolerance  
±35  
P-NꢀJunctionꢀAreaꢀ(μm)  
ChipꢀAreaꢀ(μm)  
260ꢀxꢀ460  
300ꢀxꢀ500  
140  
±35  
ChipꢀThicknessꢀ(μm)  
±15  
AuꢀBondꢀPadꢀDiameterꢀAnodeꢀ(μm)  
AuꢀBondꢀPadꢀThicknessesꢀ(μm)  
AuꢀBondꢀPadꢀAreaꢀCathodeꢀ(μm)  
BottomꢀAreaꢀꢀ(μm)  
80  
-5,ꢀ+15  
±0.5  
1.0  
98ꢀxꢀ98  
155ꢀxꢀ355  
-5,ꢀ+15  
±35  
Notes:  
1.ꢀ Maximumꢀratingsꢀareꢀpackageꢀdependent.ꢀTheꢀaboveꢀratingsꢀwereꢀdeterminedꢀusingꢀaꢀT-1ꢀ3/4ꢀpackageꢀ(withꢀHysolꢀOS4000ꢀepoxyꢀ  
encapsulationꢀandꢀclearꢀepoxyꢀdieꢀattach)ꢀforꢀcharacterization.ꢀRatingsꢀforꢀotherꢀpackagesꢀmayꢀdiffer.ꢀTheꢀforwardꢀcurrentsꢀ(DCꢀ  
andꢀPeak)ꢀareꢀnotꢀlimitedꢀbyꢀtheꢀdieꢀbutꢀbyꢀtheꢀeffectꢀofꢀtheꢀLEDꢀjunctionꢀtemperatureꢀonꢀtheꢀpackage.ꢀTheꢀjunctionꢀtemperatureꢀ  
limitꢀofꢀ125°CꢀisꢀaꢀlimitꢀofꢀtheꢀT-1ꢀ3/4ꢀpackage;ꢀjunctionꢀtemperatureꢀshouldꢀbeꢀcharacterizedꢀinꢀaꢀspecificꢀpackageꢀtoꢀdetermineꢀ  
limitations.ꢀAssemblyꢀprocessingꢀtemperatureꢀmustꢀnotꢀexceedꢀ325°Cꢀ(<ꢀ5ꢀseconds).  
2.ꢀ Productꢀresistanceꢀtoꢀelectrostaticꢀdischargeꢀ(ESD)ꢀaccordingꢀtoꢀtheꢀHBMꢀisꢀmeasuredꢀbyꢀsimulatingꢀESDꢀusingꢀaꢀrapidꢀavalancheꢀ  
energyꢀtestꢀ(RAET).ꢀTheꢀRAETꢀproceduresꢀareꢀdesignedꢀtoꢀapproximateꢀtheꢀmaximumꢀESDꢀratingsꢀshown.  
3.ꢀ Allꢀproductsꢀconformꢀtoꢀtheꢀlistedꢀminimumꢀandꢀmaximumꢀspecificationsꢀforꢀelectricalꢀandꢀopticalꢀcharacteristicsꢀwhenꢀassembledꢀ  
andꢀoperatedꢀatꢀ20ꢀmAꢀwithinꢀtheꢀmaximumꢀratingsꢀshownꢀabove.ꢀEfficiencyꢀdecreasesꢀatꢀhigherꢀcurrents.ꢀTypicalꢀvaluesꢀgivenꢀ  
arewithintherangeofaveragevaluesexpectedbymanufacturerinlargequantitiesandareprovidedforinformationonly.Allꢀ  
measurementsꢀwereꢀmadeꢀusingꢀlampsꢀinꢀT-1ꢀ3/4ꢀpackagesꢀ(withꢀHysolꢀOS4000ꢀepoxyꢀencapsulantꢀandꢀclearꢀepoxyꢀdieꢀattach).ꢀ  
OpticalꢀcharacteristicsꢀmeasuredꢀinꢀanꢀintegratingꢀsphereꢀusingꢀIlluminanceꢀE.  
Cree, Inc.  
4600 Silicon Drive  
Copyright © 2011 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree and the  
Cree logo are registered trademarks, and TR and TR3050 are trademarks of Cree, Inc.  
Durham, NC 27703-8475 USA  
Tel: +1-919-313-5300  
Fax: +1-919-313-5870  
www.cree.com/chips  
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