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VS1003B-L 参数 Datasheet PDF下载

VS1003B-L图片预览
型号: VS1003B-L
PDF下载: 下载PDF文件 查看货源
内容描述: 芬兰VLSI厂家生产的音频编解码芯片 [芬兰VLSI厂家生产的音频编解码芯片]
分类和应用:
文件页数/大小: 62 页 / 629 K
品牌: CONSONANCE [ 上海如韵 ]
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VS1003
VS1003 - MP3/WMA AUDIO CODEC
Features
Decodes MPEG 1 & 2 audio layer III
(CBR +VBR +ABR); WMA 4.0/4.1/7/8/9
all profiles (5-384kbit/s); WAV (PCM +
IMA ADPCM); General MIDI / SP-MIDI
files
Encodes IMA ADPCM from microphone
or line input
Streaming support for MP3 and WAV
Bass and treble controls
Operates with a single 12..13 MHz clock
Internal PLL clock multiplier
Low-power operation
High-quality on-chip stereo DAC with no
phase error between channels
Stereo earphone driver capable of driv-
ing a 30Ω load
Separate operating voltages for analog,
digital and I/O
5.5 KiB On-chip RAM for user code /
data
Serial control and data interfaces
Can be used as a slave co-processor
SPI flash boot for special applications
UART for debugging purposes
New functions may be added with soft-
ware and 4 GPIO pins
Description
VS1003 is a single-chip MP3/WMA/MIDI au-
dio decoder and ADPCM encoder. It contains
a high-performance, proprietary low-power DSP
processor core VS_DSP
4
, working data mem-
ory, 5 KiB instruction RAM and 0.5 KiB data
RAM for user applications, serial control and
input data interfaces, 4 general purpose I/O
pins, an UART, as well as a high-quality variable-
sample-rate mono ADC and stereo DAC, fol-
lowed by an earphone amplifier and a com-
mon buffer.
VS1003 receives its input bitstream through
a serial input bus, which it listens to as a
system slave. The input stream is decoded
and passed through a digital volume control
to an 18-bit oversampling, multi-bit, sigma-
delta DAC. The decoding is controlled via a
serial control bus. In addition to the basic de-
coding, it is possible to add application spe-
cific features, like DSP effects, to the user
RAM memory.
mic
audio
line
audio
GPIO
VS1003
MIC AMP
4
GPIO
X ROM
MUX
Mono
ADC
Stereo
DAC
Stereo Ear−
phone Driver
audio
L
R
output
DREQ
SO
SI
SCLK
XCS
XDCS
Serial
Data/
Control
Interface
X RAM
VSDSP
4
Y ROM
RX
TX
UART
Y RAM
Clock
multiplier
Instruction
RAM
Instruction
ROM
Version: 1.05, 2011-04-13
1