1.0 HDSL Systems
RS8953B/RS8953SPB
1.2 System Interfaces
HDSL Channel Unit
1.2 System Interfaces
System interfaces and associated signals for the RS8953B functional circuit
blocks are shown in Figure 1-8. Circuit blocks are described in sections 3 and 4,
and signals are defined in Table 2-2.
The single-pair version (RS8953SPBEPF and RS8953SPBEPJ) only supports
HDSL Channel 1. HDSL Channels 2 and 3 are not usable. Although only 1 HDSL
channel is usable, the internal registers are not changed from the 3 HDSL channel
versions. The single-pair versions (RS8953SPBEPF and RS8953SPBEPJ) only
supports HDSL Channel 1. HDSL Channels 2 and 3 are not usable. Although
only 1 HDSL channel is usable, the internal registers are not changed from the 3
HDSL channel versions. This means that the registers should be programmed
with the same value as if only HDSL channel 1 was used in a 3 channel version.
This allows the 3 channel version to be used for development, and without a
software change, a single-pair version used for production.
Figure 1-8. RS8953B System Interfaces
INSDAT
INSERT
DROP
TAUX1
TLOAD1
RAUX1
ROH1
BCLK1
QCLK1
TDAT1
RDAT1
HDSL
Channel1
TCLK
TSER
PCM
Channel
TMSYNC
MSYNC
TAUX2
TLOAD2
RAUX2
ROH2
BCLK2
QCLK2
TDAT2
RDAT2
HDSL
Channel2
EXCLK
RSER
RMSYNC
TAUX3
TLOAD3
RAUX3
ROH3
BCLK3
QCLK3
TDAT3
RDAT3
HDSL
Channel3
MCLK
RCLK
SCLK
DPLL
INTR*
RST*
TCK
TDI
MPU
Interface
Test
TDO
TMS
Access
MPUSEL
1-8
Conexant
N8953BDSB