4.0 Registers
RS8953B/8953SPB
4.13 Receive/Transmit Status
HDSL Channel Unit
0x01—Receive Embedded Operations Channel (REOC_HI)
7
6
5
4
3
2
1
0
MFG[2:0]
RE0C[12:8]
REOC[12:0]
MFG[2:0]
Receive EOC—Holds 13 EOC bits received during the previous HDSL frame. Refer to
Table 3-2 (Overhead Bit Allocation) for EOC bit positions within the frame. The LSB
REOC[0] is received first.
Manufacture Code—Contains the device manufacture ID code.
CH1 (address 0x01)
CH2 (address 0x09)
CH3 (address 0x11)
001
010
100
0x02—Receive Indicator Bits (RIND_LO)
7
6
5
4
3
2
1
0
RIND[7:0]
0x03—Receive Indicator Bits (RIND_HI)
7
6
5
4
3
2
1
0
MINOR_VER[2:0]
RIND[12:8]
RIND[12:0]
Receive IND—Holds 13 IND bits received during the previous HDSL frame. Refer to
Table 3-2 (Overhead Bit Allocation) for the IND bit positions within the frame. The receive
framer updates the RIND registers on receive frame interrupt boundaries. The LSB RIND[0] is
received first.
MINOR_VER[2:0] Minor Version Number—Contains the device minor revision level which the MPU can read to
determine the installed device, enabled new software features, and remove unnecessary
software corrections from older versions.
Rev A
000
010
Rev B
000
010
Rev C
000
010
CH1 (address 0x03)
CH2 (address 0x0B)
CH3 (address 0x13)
000
001
010
0x04—Receive Z-Bits (RZBIT_1)
7
6
5
4
3
2
1
0
RZBIT[7:0]
4-54
Conexant
N8953BDSB