7.0 Electrical/Mechanical Specifications
RC224ATL/224ATLV
7.3 Interface Timing and Waveforms
EmbeddedModem Family
7.3 Interface Timing and Waveforms
Table 7-2 lists the host bus interface timing parameters. Figure 7-1 illustrates the
interface waveforms. Table 7-3 lists the current and power requirements, and
Table 7-4 lists absolute maximum ratings.
Table 7-2. Timing–Host Bus Interface
Symbol
tAS
Parameter
Address Setup
Min
25
0
Max
—
—
—
—
—
75
—
—
—
—
30
40
—
100
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAH
Address Hold
tCS
Chip Select Setup
Chip Select Hold
Read Strobe Width
Delay HRD to Data
HRD to Data Hold
Write Strobe Width
Write Data Setup
Write Data Hold
HRD to Driver Off
HDIS Enable
10
0
tCH
tRD
100
—
10
75
30
10
—
—
40
—
tDD
tDRH
tWT
tDS
tDWH
tDF
tDIS
tDIH
tINH
HDIS Hold
Interrupt Hold
7-2
Conexant
D224ATLVDSC