Synchronous Receiver Transmitter (SOPIF)
General Purpose Inputs and/or Outputs
One synchronous only serial interface (SOPIF) is
built into the MFC1000, allowing the MFC1000 to
communicate with the external operator panel
module and with other external peripherals. The
SOPIF provides separate signals for Data (SSTXD,
SSRXD), Clock (SSCLK), and optional Data
Request / Data Acknowledge (SSREQ/SSACK). It is
a full duplex, three-wire system. The SOPIF may be
configured to operate as either a master or slave
interface. The bit rate, clock polarity, clock phase,
and data shifting order are programmable.
Synchronous/Asynchronous Receiver Transmitter
(SASIF)
The MFC1000 provides up to 15 GPIO’s and 8
GPO's.
1284 Bi-directional Parallel Interface
An IEEE 1284 compatible bi-directional peripheral
parallel port is provided. Compatibility, nibble, byte,
and ECP modes are supported. The Parallel I/O
interface can be programmed to support CPU or
DMA data transfers. DMA is available in
Compatibility, nibble, and ECP modes.
Autobaud
One Synchronous/Asynchronous serial interface
(SASIF) which performs serial-parallel conversion on
data received from a peripheral device and parallel-
to-serial conversion of data for transmission to a
peripheral device. The interface consists of serial
transmit data (SASTXD), serial receive data
(SASRXD), and a serial clock (SASSCLK) signals.
The SASIF includes a programmable bit rate
generator for asynchronous and synchronous
operations. The data shifting order, Data bit number,
and the SASSCLK polarity are programmable.
Real-Time Clock (RTC)
An autobaud circuit supports detection of baud rate
and data structure (parity and character length) for
programming an external UART. A precision timer,
shift register and edge detector are included to
determine the width of the start bit and to sample the
serial data stream. Serial data rates up to 115.2
KBPS are supported.
Watchdog Timer
The MFC1000 includes a battery backup real-time
clock. The RTC automatically maintains the correct
date and time for 32 years. The leap year
compensation is included. A 32.768 kHz or 65.536
kHz watch crystal is required by the RTC.
Tone/Bell/Ring Generator
The Watchdog Timer guards against firmware
lockup on the part of either Executive-controlled
background tasks or interrupt-driven tasks, and can
be only enabled by a sequence of events under
control of the Watchdog Control Logic. Once the
Watchdog Timer has been enabled, it can not be
disabled unless a system reset occurs.
Reset and Power Control
The MFC1000 provides three programmable clock
generator outputs. Two of the generators are used
as tone generators and the third as a bell or ring
driver.
The BATRSTn input initializes the MFC1000 at
power-on. An externally generated power-down
input, PWRDWNn, controls switching between
primary and battery power. The open drain RESETn
I/O pin provides a reset output to external circuits, or
can accept an externally generated reset. The
external reset will not reset the RTC. Separate
DRAM and RTC battery power inputs are provided
for battery-backed up functions.
MD192
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CONEXANT [ CONEXANT SYSTEMS, INC ]
