CX82100 Home Network Processor Data Sheet
7.7.4
Sequence of Transmitter DMA Operation
TMAC DMA operation is illustrated in Figure 7-6.
Figure 7-6. TMAC DMA Operation for Channel {x} = 1 or 3
Host assembles the frame to
be transmitted in linked list
structure and writes the TDES
Host programes the base
pointer DMAC_{x}_PTR1 and
the length DMAC_{x}_CNT1 for
the 1st fragment of the frame
Host sets the E_NA_STRT bit in
register E_NA_{x} to cause the
TMAC to start the transmission
TMAC starts the DMA on channel {x} by issuing
the DMA_SAVE command to DMAC. DMAC
saves PTR1 to PRT2 and CNT1 to CNT2.
TMAC issues DMA_XNXT
command to DMAC to skip
the TSTAT field.
TMAC issues DMA_XNXT command
to DMAC to receive the TDES and
the 1st 4 bytes of the data.
no
TDES.RDY bit ON?
yes
TMAC issues DMA_XNXT
commands to fill up the FIFO
and starts transmitting nibbles.
TMAC updates the E_S_TU bit in register
E_Stat_1 (or E_Stat_2) to interrupt the
host, providing the bit E_IE_TU is set in
register E_IE_1 (or E_IE_2)
no
Last double word
received?
Host reads the bit
TSTAT.TDN to determine
the transmission status.
yes
TMAC continues to
transmit nibbles in the
FIFO until completion.
TMAC Transmission
stopped.
TMAC issues
DMA_XSAVE to request
DMAC to write the TSTAT
to host memory
TMAC issues DMA_INTR
to DMAC to signal the
end of a frame.
101545_033
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Conexant Proprietary and Confidential Information
101306C
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