CX82100 Home Network Processor Data Sheet
2
CX82100 HNP Hardware Interface
2.1
CX82100 HNP Hardware Interface Signals
2.1.1
CX82100-11/-12/-51/-52 Signal Interface and Pin Assignments
CX82100-11/-12/-51/-52 HNP hardware interface signals are shown in Figure 2-1.
CX82100-11/-12/-51/-52 HNP pin signals are shown in Figure 2-2 and are listed in Table
2-1.
Note: The CX82100-11/-12/-51/-52 supports the following two signals on the indicated
pins (different from the CX82100-41/-42): P13 = VSS0 and P14 = HC00
(HCS0#)/GPIO32 (see Section 2.1.1). Other pinouts are the same as the
CX82100-41/-42.
2.1.2
2.1.3
CX82100-41/-42 Signal Interface and Pin Assignments
CX82100-41/-42 HNP hardware interface signals are shown in Figure 2-3.
CX82100-41/-42 HNP pin signals are shown in Figure 2-4 and are listed in Table 2-2.
Note: The CX82100-41/-42 supports the following two signals on the indicated pins
(different from the CX82100-11/-12/-51/-52): P13 = HC00 (HCS0#)/GPIO32
and P14 = HC10 (HRDY#) (see Section 2.1.2). Other pinouts are the same as
the CX82100-11/-12/-51/-52.
CX82100 HNP Signal Definitions
CX82100 HNP hardware interface signals are defined in Table 2-3.
CX82100 HNP input/output types are described in Table 2-4.
CX82100 HNP DC electrical characteristics are listed in Table 2-5.
101306C
Conexant Proprietary and Confidential Information
2-1