CX28394/28395/28398
3.0 Registers
Quad/x16/Octal—T1/E1/J1 Framers
3.15 Data Link Registers
0B4—RDL #2 Status (RDL2_STAT)
7
6
5
4
3
2
1
0
—
—
—
RMSG2
RSTAT2
RMPTY2
RNEAR2
RFULL2
RMSG2
In Progress Receive Message—The real-time status of the receive message sequencer is
provided mostly for processor polled applications. During HDLC modes, RMSG2 is high for
the interval between opening and closing FLAG characters to indicate the receiver is actively
filling FIFO locations (in which case RSTAT2 is also held high). RMSG2 is low while the
channel receives FLAG or Abort characters. During unformatted modes, RMSG2 is high
continuously.
0 = channel idle
1 = channel actively filling FIFO
RSTAT2
Next FIFO Read Equals Message Status—For non-empty FIFO conditions (RMPTY2=0),
RSTAT2 indicates that the next byte read from RDL2 will be WORD0 message status or
WORD1 message data. Notice that RSTAT2 equals zero if the FIFO is empty, and there is no
message in progress. Processor polls RSTAT2 before reading RDL2 to determine how to
interpret RDL2 read byte value, or checks RSTAT2 in response to RMSG interrupt [ISR1; addr
00A].
0 = RDL2 byte equals Message Data (or empty FIFO, if RMTPY2=1)
1 = RDL2 byte equals Message Status (if RMPTY2=0)
RMPTY2
RNEAR2
Receive FIFO Empty—Indicates no data or status bytes are present in receive data link FIFO.
0 = FIFO contains data or status as indicated by RSTAT2
1 = FIFO empty
Receive FIFO Near Full—Indicates the data link has filled receive FIFO to the near full
threshold level specified in FFC[5:0]. Upon reaching the near full level, the receiver updates
the message status byte [WORD0] placed on top of the FIFO and reports the current in
progress message with a Partial end of message status. The processor must read those filled
FIFO locations to clear RNEAR2 status indicator, and to enable the next RNEAR interrupt.
0 = FIFO depth is below the near full level
1 = FIFO has been filled to the near full level
RFULL2
Receive FIFO Full—Indicates data link has completely filled 64 byte locations in the receive
FIFO. In all cases, RFULL2 is an error, indicating the processor didn’t keep pace with the
receiver and indicates one or more received messages were discarded after the FIFO became
full. The FIFO may still contain one or more Good received messages, and the processor may
still process all receive FIFO contents as usual. However, any message that was in progress
when FIFO reached full is discarded and is also reported with Partial end of message status
and a zero byte count (which distinguishes a full end of message status from a normal abort or
error message status).
0 = FIFO is less than full
1 = FIFO has been completely filled
100054E
Conexant
3-89