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CX28333-1X 参数 Datasheet PDF下载

CX28333-1X图片预览
型号: CX28333-1X
PDF下载: 下载PDF文件 查看货源
内容描述: 单/双/三E3 / DS3 / STS - 1线路接口单元 [Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit]
分类和应用: 电信集成电路PC
文件页数/大小: 68 页 / 549 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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1
1.0 Pin Description  
1.1 Pin Assignments  
Figures 1-1 (CX28331-1x), 1-2 (CX28332-1x), and 1-3 (CX28333-1x) illustrate  
pin assignments for the 80-pin Exposed Thin Quad Flat Package (ETQFP). See  
Table 1-1 for the CX2833i-1x pin descriptions.  
Figures 1-4 (CX28331-3x), 1-5 (CX28332-3x), and 1-6 (CX28333-3x)  
illustrate pin assignments for the 100-pin ETQFP. The 100-pin package adds  
more functionality, supporting new features such as Transmit Monitoring and  
Transmit Monitoring Status testing. See Table 1-2 for the CX2833i-3x pin  
descriptions.  
The input/output (I/O) column is coded as follows:  
I = Input  
O = Output  
I/O = Bidirectional  
P = Power  
NOTE: All digital inputs and outputs contain 75 kpull-down resistors.  
When a channel is disabled (i.e., the PDx pin is tied low or not connected), all  
receive and transmit analog circuitry powers down. Analog inputs (RLINE) are  
ignored and analog outputs (TLINE) are high impedance. Digital inputs of a  
powered-down channel are still active, but ignored. Overall noise on the device  
can be lowered by not driving the digital inputs of a powered-down channel.  
NOTE: When power is disconnected from the device, TLINE pins are low  
impedance to ground if driven by more than one forward-bias diode  
voltage (0.7 V) below ground. Additionally, driving TLINE, a  
forward-bias diode voltage above the VGG pin, creates a low impedance  
path from the TLINE pin to the VGG pin. Otherwise, the TLINE pins are  
high impedance.  
100985A  
Conexant  
1-1  
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