CX28331/CX28332/CX28333
1.0 Pin Description
Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit
1.1 Pin Assignments
Table 1-2. CX2833i-3x Pin Definitions (2 of 8)
Pin #
Signal Name
Description
I/O/P
Notes
CX28331-3x CX28332-3x CX28333-3x
Digital Data Pins
69
—
70
—
—
—
84
—
85
41
—
84
—
85
69
RPOS/
RNRZ
Ch1 receive
Positive rail or
NRZ data
O
Resynchronized receive data intended to be
strobed out by the corresponding RCLK.
RPOS1/
RNRZ1
When ENDECDIS = 1, these outputs are
positive and negative AMI data (RPOS and
RNEG).
RNEG/
RLCV
Ch1 receive
Negative rail or
line code
O
When ENDECDIS = 0, these outputs are
decoded NRZ data (RNRZ) and line code
violation (RLCV). A line code violation is
indicated when RLCV = 1.
RNEG1/
RLCV1
violation
RPOS2/
RNRZ2
Ch2 receive
Positive rail or
NRZ data
O
O
See notes on the ENDECDIS pin in the
Control Signals section.
—
40
70
RNEG2/
RLCV2
Ch2 receive
Negative rail or
line code
violation
—
—
—
—
41
40
RPOS3/
RNRZ3
Ch3 receive
Positive rail or
NRZ data
O
O
RNEG3/
RLCV3
Ch3 receive
Negative rail or
line code
violation
68
—
—
—
83
42
—
83
68
RCLK
RCLK1
RCLK2
Receive clock
Ch1
O
Recovered clock for each channel receiver,
intended for strobing the corresponding
RDAT into the following framer or logic.
Receive clock
Ch2
O
O
—
—
42
RCLK3
Receive clock
Ch3
100985A
Conexant
1-15
CONEXANT [ CONEXANT SYSTEMS, INC ]
