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CX25870 参数 Datasheet PDF下载

CX25870图片预览
型号: CX25870
PDF下载: 下载PDF文件 查看货源
内容描述: 视频编码器与自适应闪烁过滤和HDTV输出 [Video Encoder with Adaptive Flicker Filtering and HDTV Output]
分类和应用: 电视编码器
文件页数/大小: 291 页 / 3791 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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CX25870/871  
1.0 Functional Description  
Flicker-Free Video Encoder with Ultrascale Technology  
1.3 Device Description  
While in CCIR656 Mode, the encoder adheres to all input guidelines specified  
in the ITU-R BT.656-3 standard. This specification was developed for the  
transmission of color video signals in YCrCb format at a pixel rate of  
27.000 MHz without the use of dedicated timing reference signals.  
To display a DVD movie on a TV and computer monitor simultaneously with  
high-quality MPEG2 image format, the CX25870/871 must be integrated into the  
hardware design. Next, actual CCIR656 data must be sent from a MPEG2  
decoding master device directly to the CX25870/871 encoder. Finally, various  
software steps are necessary so the encoder switches to its Slave interface and is  
set up to accept the interlaced YCrCb data and video timing reference codes.  
The first programming step is to configure the CX25870/871 to accept  
interlaced 4:2:2 YCrCb data with an active resolution of 720x480 and output a  
standard NTSC video output. The pertinent set of conditions for this option are:  
• Type of Digital Video Input:  
• Active Resolution (HorizontalxVertical):  
• Overscan Compensation:  
• Interface:  
Interlaced 4:2:2 YCrCb  
720 pixels x 480 lines  
None. Horizontal = 0%; Vertical = 0%  
CX25870/871 is clock and timing slave  
27.000 MHz  
• Pixel Rate  
• Type of Analog Video Output:  
Standard NTSC[NTSC-M]  
Given this set of conditions, autoconfiguration mode 28 is a perfect fit. As a  
result, simply use the MPEG2 decoders serial bus mastering ability to program  
the CX25870/871s CONFIG[5:0] field with a binary value of 011100. This  
translates into writing a hexadecimal number of 0x34 to register 0xB8. Once the  
encoder acknowledges this write to its autoconfiguration register, it automatically  
loads the appropriate values for this type of DVD configuration into its register  
indices from 0x76 to 0xB4, including register 0x38. The exact data transferred  
into these registers is contained in Appendix C.  
After completion of the autoconfiguration command, the encoder expects to  
receive interlaced 4:2:2 YCrCb data from the clock and timing master device at a  
rate of 27.000 MHz with blanking regions being defined by HSYNC* and  
VSYNC*. Since these external signals, by definition, do not exist in CCIR656  
mode, a second and final programming step is required.  
After enabling autoconfiguration mode 28, the programmer must make sure to  
set (=1) the E656 bit. This is bit 6 of register 0xD6 and enables a CCIR656 input  
to be received via the CX25870/871s P[7:0] port. Once this is done, the encoder  
deciphers digital blanking through the SAV and EAV codes and disregards the  
synchronization signals.  
Only after the completion of these steps will a DVD stream be properly  
encoded and rendered onto the television by the VGA Encoder.  
For CCIR Mode operation with a PAL Composite or S-Video output, use  
Autoconfiguration Mode 29 instead of autoconfiguration mode 28 and program  
the master device to send a digital frame with an active resolution of 720x576.  
100381B  
Conexant  
1-65  
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