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CX25870 参数 Datasheet PDF下载

CX25870图片预览
型号: CX25870
PDF下载: 下载PDF文件 查看货源
内容描述: 视频编码器与自适应闪烁过滤和HDTV输出 [Video Encoder with Adaptive Flicker Filtering and HDTV Output]
分类和应用: 电视编码器
文件页数/大小: 291 页 / 3791 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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4.0 Parametric Information  
CX25870/871  
4.2 AC Electrical Parameters  
Flicker-Free Video Encoder with Ultrascale Technology  
Table 4-4. AC Characteristics for CX25870/871 (3 of 3)  
HDTV Output Timing Characteristics: 1080i (see Figure 4-9)  
Parameter  
Symbol  
Min  
Typical  
Max  
Units  
ns  
Lowsync width  
α
β
598.8  
28.385  
598.8  
1.796  
2.588  
54.5  
Start of line to end of active video  
Highsync width  
µs  
ns  
µs  
µs  
ns  
µs  
µs  
χ
Rising edge of sync to start of broad pulse  
Start of line to start of active video  
Sync rise time  
δ
ε
φ
Total line time  
29.685  
25.778  
Active line time  
HDTV Output Timing Characteristics: 720p (see Figure 4-10)  
Parameter  
Symbol  
Min  
Typical  
Max  
Units  
Lowsync width  
a
b
548  
ns  
µs  
ns  
µs  
µs  
ns  
µs  
µs  
Start of line to end of active video  
High sync width  
20.54  
548  
c
Rising edge of sync to start of broad pulse  
Rising edge of sync to start of active video  
Sync rise time  
d
3.53  
3.53  
54.7  
22.2  
17.16  
e
Total line time  
Active line time  
NOTE(S):  
1. Guaranteed by characterization; NTSC output, no vertical or horizontal scaling. Flicker Filter and other internal low-pass filters  
bypassed, and contrast, brightness, saturation levels set to full scale.  
(2)  
100/7.5/100/7.5 Color bars normalized to burst.  
Guaranteed by design.  
Control pins are defined as: BLANK*, HSYNC*, VSYNC*, FIELD, CLKO, CLKI, RESET*, PAL, and SLAVE.  
DAC output load < 75 pF. HSYNC*, VSYNC*, BLANK*, and FIELD output load < 75 pF. As the above parameters are  
(3)  
(4)  
(5)  
guaranteed over the full temperature range, temperature coefficients are not specified or required. Typical values are based on  
nominal temperature, i.e., room temperature, and nominal voltage, i.e., 3.3 V.  
There are numerous power-down options. This value was determined by setting SLEEP_EN, DIS_CLKI, DIS_CLKO, BY_PLL,  
(6)  
XTL_BFO_DIS, XTAL_PAD_DIS bits and pulling the SLEEP pin high.  
This value was determined by setting BY_PLL, SLEEP_ED, DIS_CLKI, DIS_CLKO, XTAL_BFO_DIS bits.  
To ensure that the encoder performance falls within DC and AC electrical limits, no more than one DAC should be disabled at  
(7)  
(8)  
any time.  
4-6  
Conexant  
100381B  
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