CX25870/871
3.0 PC Board Considerations
Flicker-Free Video Encoder with Ultrascale Technology
3.4 Decoupling
3.4 Decoupling
3.4.1 Device Decoupling
For optimum performance, all capacitors should be located as close as possible to
the device, and the shortest possible leads (consistent with reliable operation)
should be used to reduce the lead inductance. Chip capacitors are recommended
for minimum lead inductance. Radial lead ceramic capacitors can be substituted
for chip capacitors and are better than axial lead capacitors for self-resonance.
Values are chosen to have self-resonance above the pixel clock.
3.4.2 Power Supply Decoupling
The best power supply performance is obtained with a 0.1 µF ceramic capacitor
decoupling each group of VAA pins and each group of VDD pins to GND. The
capacitors should be placed as close as possible to the device VAA/VDD pins and
GND pins and connected with short, wide traces.
The 47 µF capacitor shown in Figure 3-2 is for low-frequency power supply
ripple; the 0.1 µF capacitors are for high-frequency power supply noise rejection.
Inclusion of a 0.01 µF and a 1.0 µF capacitor between the group of VAA/VDD
pins and GND/VSS pins will improve power supply decoupling at intermediate
frequencies as well.
When a linear regulator is used, the proper power-up sequence must be
verified to prevent latchup. A linear regulator is recommended to filter the analog
power supply if the power supply noise is greater than or equal to 200 mV. This is
especially important when a switching power supply is used, or low voltage
interface is implemented, and the switching frequency is close to the raster scan
frequency. About 5 percent of the power supply hum and ripple noise less than
1 MHz will couple onto the analog outputs.
3.4.3 COMP Decoupling
The COMP pin must be decoupled to the closest VAA pin, typically with a 0.1 µF
ceramic capacitor. Low-frequency supply noise will require a larger value. The
COMP capacitor must be as close as possible to the COMP and VAA pins. A
surface-mount ceramic chip capacitor is preferred for minimal lead inductance.
Lead inductance degrades the noise rejection of the circuit. Short, wide traces will
also reduce lead inductance.
3.4.4 VREF Decoupling
A 1.0 µF ceramic capacitor should be used to decouple this input to GND.
3.4.5 VBIAS Decoupling
A 0.1 µF ceramic capacitor should be used to decouple this output to GND.
100381B
Conexant
3-9