A
Appendix A JTAG Interface
The CN8478 supports boundary scan testing conforming to IEEE standard
1149.1a-1993 and supplement 1149.1b. 1994. This appendix is intended to assist
the customer in developing boundary scan tests for printed circuit boards and
systems that use the CN8478. It is assumed that the reader is familiar with
boundary scan terminology. For the latest version of the Boundary Scan
Description Language (BSDL) file, contact Technical Publications.
The JTAG Interface section of the CN8478 provides access to all external I/O
signals of the device for board and system level testing. This circuitry also
conforms to IEEE std 1149.1a-1993.
A.1 Instruction Register
The Instruction register (IR) is a 3-bit register. When the boundary scan circuitry
is reset, the IR is loaded with the BYPASS Instruction. The Capture-IR binary
value is 001.
The eight instructions include three IEEE 1149.1 mandatory public
instructions (BYPASS, EXTEST, and SAMPLE/PRELOAD) and five private
instructions for manufacturing use only. Bit 0 (LSB) is shifted into instruction
register first.
Table A-1. IEEE Std. 1149.1 Instructions
Bit 2
Bit 1
Bit 0
Instruction
Register Accessed
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
EXTEST
SAMPLE/PRELOAD
Private
Boundary Scan
Boundary Scan
—
—
Private
Private
—
Private
—
Private
—
BYPASS
Bypass
100660E
Conexant
A-1