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CN8474AEPF 参数 Datasheet PDF下载

CN8474AEPF图片预览
型号: CN8474AEPF
PDF下载: 下载PDF文件 查看货源
内容描述: 多通道同步通信控制器( MUSYCC ™ ) [Multichannel Synchronous Communications Controller (MUSYCC?)]
分类和应用: 通信控制器
文件页数/大小: 221 页 / 2104 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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6.0 Basic Operation  
CN8478/CN8474A/CN8472A/CN8471A  
6.4 Protocol Support  
Multichannel Synchronous Communications Controller (MUSYCC™)  
Out of Frame (OOF)  
Out-of-frame or loss-of-frame indicates that the entire serial data stream is invalid  
and data cannot be recovered from such a signal. In this case, out-of-frame of the  
incoming signal occurred while in the midst of receiving an HDLC message and  
copying the data to shared memory.  
Reason:  
MUSYCC writes the T1/E1 signal failure is detected by the physical  
interface providing the serial data, clock frequency, and synchronization to  
the serial interface on MUSYCC.  
Effects:  
MUSYCC writes the Interrupt Descriptor in Interrupt Queue with  
ERROR = OOF, DIR = 0 (if MSKOOF = 0 in Group Configuration  
Descriptor).  
If bit field OOFABT = 0, BLP, and DMAC continue as if no errors  
occurred and transfer received data into shared memory buffers normally.  
If bit field OOFABT = 1 and is currently receiving an HDLC message, the  
received data in the internal FIFO buffer is discarded and lost to the host.  
DMAC accesses the Next Message Pointer from the current Message  
Descriptor. MUSYCC returns ownership of the current Message  
Descriptor by writing the Receive Buffer Status Descriptor with  
ONR = HOST, ERROR = OOF (if INHRBSD = 0 in Receive Channel  
Configuration Descriptor).  
Regardless, the BLP continues scanning for opening flag.  
Simultaneously, DMAC checks for Message Descriptor ownership before  
transferring received data to shared memory.  
Receive channel recovers automatically.  
Channel Level Recovery Actions:  
None required.  
Frame Check  
Sequence (FCS) Error  
In the case of an FCS error, the frame check sequence (or CRC) calculated for the  
received HDLC message by MUSYCC does not match the FCS sent within the  
HDLC message.  
Reason:  
Bit errors during transmission.  
Effects:  
The Interrupt Descriptor in Interrupt Queue with ERROR = FCS, DIR = 0  
(if MSKMSG = 0 in Channel Configuration Descriptor).  
The entire HDLC message already copied to shared memory buffers.  
DMAC accesses the Next Message Pointer from the current Message  
Descriptor.  
Returns ownership of the current Message Descriptor to the host by  
writing the Receive Buffer Status Descriptor with ONR = HOST,  
ERROR = FCS (if INHRBSD = 0 in Channel Configuration Descriptor).  
The BLP scans for the opening flag of the next HDLC message.  
Simultaneously, DMAC checks for Message Descriptor ownership before  
transferring received data to shared memory.  
Channel Level Recovery Actions:  
None required.  
6-40  
Conexant  
100660E  
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