CN8478/CN8474A/CN8472A/CN8471A
1.0 System Description
Multichannel Synchronous Communications Controller (MUSYCC™)
Figure 1-2. Detailed System Block Diagram
RCLK0
RSYNC0
RDAT0
ROOF0
TCLK0
TSYNC0
TDAT0
Host Interface
Serial Interface Channel Group 0
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
Device
Configuration
Registers
PCLK
PRST*
INTB*
RCLK1
RSYNC1
RDAT1
ROOF1
TCLK1
Serial Interface Channel Group 1
INTA*
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
GNT*
Interrupt
Controller
REQ*
TSYNC1
TDAT1
PCI
Interface
SERR*
PERR*
IDSEL*
FRAME*
IRDY*
RCLK2
RSYNC2
RDAT2
ROOF2
TCLK2
TSYNC2
TDAT2
Serial Interface Channel Group 2
PCI
Configuration
Space
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
[Function 0]
TRDY*
DEVSEL*
STOP*
PAR*
PCI
Configuration
Space
RCLK3
RSYNC3
RDAT3
ROOF3
TCLK3
TSYNC3
TDAT3
Serial Interface Channel Group 3
CBE[3:0]*
AD[31:0]
Port
Interface
Tx/Rx
[Function 1]
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
M66EN
RCLK4
RSYNC4
RDAT4
ROOF4
TCLK4
TSYNC4
TDAT4
Serial Interface Channel Group 4
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
TCK
TEN*
TMS
TDO
RCLK5
RSYNC5
RDAT5
ROOF5
TCLK5
TSYNC5
TDAT5
Serial Interface Channel Group 5
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
TDI
RCLK6
RSYNC6
RDAT6
ROOF6
TCLK6
TSYNC6
TDAT6
Serial Interface Channel Group 6
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
RCLK7
RSYNC7
RDAT7
ROOF7
TCLK7
TSYNC7
TDAT7
Serial Interface Channel Group 7
Port
Interface
Tx/Rx
Bit-Level
Processor
Tx/Rx-BLP
DMA
Controller
Tx/Rx-DMAC
Interrupt
Controller
SCAN_EN
TM0
TM1
Boundary Scan and Test Access
Scan
ECLK
RD* (DS*)
WR* (R/WR*)
ALE*
Data
BGACK*
HOLD (BR*)
HLDA (BG*)
EBE[3:0]*
EAD[31:0]*
EINT*
Expansion Bus Interface
Control
8478_002
100660E
Conexant
1-3