6.0 Basic Operation
CN8478/CN8474A/CN8472A/CN8471A
6.4 Protocol Support
Multichannel Synchronous Communications Controller (MUSYCC™)
The following items apply to all event and error handling as described in the
transmit and receive sections which follow:
•
During bit level operations, events and errors can affect the outcome
message processing. Unless masked, all events and errors generate
Interrupt Descriptors within MUSYCC. Interrupt Descriptors identify the
error or event condition, the transmit or receive direction, and the channel
and channel group number affected.
•
If a channel is suspended, enters an idle mode, enters an abort mode, or is
autonomously turned off by MUSYCC during bit-level operations, a
channel reactivation must occur by either a Channel Activation Service
Request or a Channel Jump Service Request. This is referred to as
“requiring reactivation.”
•
•
The bit fields INHTBSD and INHRBSD in the Group Configuration
Descriptor specify whether or not MUSYCC can write a Buffer Status
Descriptor into a Message Descriptor to indicate that MUSYCC has
completed servicing the descriptor.
In cases where bit-level operations continue normally, the DMAC accesses
the Next Message Pointer from the current Message Descriptor. This
accesses the next Message Descriptor in the chain of descriptors for a
particular channel and direction. Each Message Descriptor indicates
whether or not the host or MUSYCC owns the descriptor.
6.4.7.1 Transmit
The transmitter initiates data transfer from shared memory to the serial interface
only if the following conditions are true:
•
•
TXENBL bit is set to 1 in the Group Configuration Descriptor.
Transmit channel is mapped to logical channel(s) in Transmit Time Slot
Map.
•
Transmit channel is (re)activated (via service request).
If the TXENBL bit is set to 0, the output signal is a three-state signal. If the
channel is not mapped or is inactive, the transmitter either outputs a three-state or
an all 1s signal depending on the state of the bit field TRITX in the Group
Configuration Descriptor.
6.4.7.2 Receive
The receiver transfers data from the serial interface to memory buffers in shared
memory only if all the following conditions are true:
•
•
RXENBL bit is set to 1 in the Group Configuration Descriptor.
Receive channel is mapped to one or more logical channel(s) in Receive
Time Slot Map.
•
Receive channel is (re)activated (via service request).
If any one of the above conditions is not true, the receiver ignores the
incoming data stream.
Data transfer consists of MUSYCC first seeking out the next Message
Descriptor from the Channel Group Descriptor in shared memory for each active
channel. The Buffer Descriptor in each Message Descriptor plus the protocol
mode set for the channel dictates the treatment of the incoming bit stream.
6-32
Conexant
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CONEXANT [ CONEXANT SYSTEMS, INC ]
