CN8478/CN8474A/CN8472A/CN8471A
6.0 Basic Operation
Multichannel Synchronous Communications Controller (MUSYCC™)
6.3 Channel Operation
The components of the Transmit Subchannel map are listed in Table 6-9.
Table 6-9. Example—Components of Transmit Subchannel Map
Descriptor
Component of Descriptor
Value of Components
Subchannel
Map
(dword 4)
BITEN3/7
CH3/7
1 = Bit 3 enabled
1 = Logical channel 1
1 = Bit 2 enabled
BITEN2/6
CH2/6
1 = Logical channel 1
1 = Bit 1 enabled
BITEN1/5
CH1/5
1 = Logical channel 1
BITEN0/4
CH0/4
0 = Bit 0 not assigned here, see Time Slot Map
0 = Bit 0 not assigned here see Time Slot Map
0 = Bit 7 disabled
Subchannel
Map
(dword 5)
TSEN3/7
CH3/7
0 = Don’t care
TSEN2/6
CH2/6
0 = Bit 6 disabled
0 = Don’t care
TSEN1/5
CH1/5
0 = Bit 5 disabled
0 = Don’t care
TSEN0/4
CH0/4
0 = Bit 4 disabled
0 = Don’t care
6.3.11 Transmit Channel Configuration Descriptor
/* each transmit channel descriptor is made up of 1 dwords */
/* need to define channel 0, 1, and 2 - 3 dwords total */
/* dword 0 for logical channel 0 */
/* dword 1 for logical channel 1 */
/* dword 2 for logical channel 2 */
/* for logical channel 0 */
/* pad count adjustment = 0, disabled */
/* buffer location index = 0 */
/* data inversion = 0, disabled */
/* internal buffer length = 0 */
/* end of padfill interrupt = 0, disabled */
/* protocol = 2, hdlc-16-fcs */
/* message length check register = 1, use register 1 */
/* fcs transfer = 0, normal, do not transfer rx fcs into shared memory */
/* mask suerr interrupt = 0, do not mask, enable interrupt */
/* mask sinc. interrupt = 0, do not mask, enable interrupt */
/* mask sdec. interrupt = 0, do not mask, enable interrupt */
/* mask sfilt interrupt = 0, do not mask, enable interrupt */
/* mask idle. interrupt = 0, do not mask, enable interrupt */
/* mask msg interrupt = 0, do not mask, enable interrupt */
/* mask eom interrupt = 0, do not mask, enable interrupt */
/* mask buff. interrupt = 0, do not mask, enable interrupt */
100660E
Conexant
6-17