6.0 Basic Operation
CN8478/CN8474A/CN8472A/CN8471A
6.3 Channel Operation
Multichannel Synchronous Communications Controller (MUSYCC™)
6.3 Channel Operation
To start any channel processing, a series of shared memory segments must be
obtained by the host and initialized as specific descriptors which MUSYCC can
use to control its channel processing operations.
To illustrate the required MUSYCC configuration, assume the following:
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Port 0 is physically wired to a PCM carrying E1 signal (2.048 Mbps).
EBUS is not used.
PCI configuration is displayed in Table 5-3, MUSYCC PCI Function
Memory Allocation.
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Memory Protection is enabled for range 0x00100000 to 0x001FFFFF.
Application:
– Port 0 is configured for 32 channel operation, E1 signal, 2.048 Mbps.
– Transmit and Receive time slots are mapped identically.
– Time slot 0 is mapped to logical channel 0 (64 kbps).
– Time slot 1 bits 0–3 are mapped to logical channel 1 (32 kbps
subchannel).
– Time slot 2–3 are mapped to logical channel 2 (128 kbps
hyperchannel).
– 16-bit FCS HDLC.
– Maximum message length is 1024 octets for channel 0.
– Maximum message length is 512 octets for channel 1.
– Maximum message length check is disabled for channel 2.
– No SS7 functions.
– Idle Code = 7Eh.
– Pad Fill Count = 0.
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C-Language support.
Each section below builds on the previous sections.
6.3.1 Group Structure
A group structure (one per supported group) must be allocated in shared memory.
A data structure is instrumental in keeping the memory spaces for the various
descriptors required for a channel group configuration in a sequential order and at
exact offsets from the beginning of the group structure.
Once a group structure is allocated in shared memory, all descriptor spaces are
allocated within the group structure.
Service request handling within MUSYCC requires the group structure and
descriptor contents be at an exact offsets within the structure.
6-8
Conexant
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