5.0 Memory Organization
CN8478/CN8474A/CN8472A/CN8471A
5.2 Descriptors
Multichannel Synchronous Communications Controller (MUSYCC™)
Table 5-23. Receive Buffer Descriptor
Bit
Field
Name
Value
Description
31
OWNER
0
1
MUSYCC Owns Buffer. Continue processing data buffer normally.
HOST Owns Buffer. Channel is to remain in idle mode while polling this bit periodically
(if NP = 0) until host relinquishes control to MUSYCC by setting OWNER = 0.
In transparent mode the channel is deactivated.
30
NP
0
1
Poll Enabled. If OWNER = 1, host-owned, MUSYCC polls message descriptor
periodically until OWNER = 0.
Poll Disabled. If OWNER = 1 then wait for a Channel Activate Service Request from
host.
29
28
RSVD
EOBI
0
0
Reserved.
End of Buffer Interrupt Disabled. When more data cannot be taken from or put into a
data buffer, an EOB interrupt is not generated.
1
0
End of Buffer Interrupt enabled.
Reserved.
27:14
13:0
RSVD
BLEN[13:0]
Buffer Length. Actual number of received data octets might be less than this. This
number indicates how many will fit into data buffer. The buffer length should not
exceed 8 k.
5.2.4.7 Buffer Status
Descriptor
The Buffer Status Descriptor contains status information regarding data buffer
servicing. If configured to do so, MUSYCC writes a Buffer Status Descriptor
over a Buffer Descriptor. This descriptor includes the following fields:
•
•
•
Owner Indicator Bit (OWNER)
End of Message Indicator (EOM)
Data Length (DLEN)
In addition to the fields, a Receive Buffer Status Descriptor also includes the
Error Status (ERROR) bit field.
Buffer Status Descriptors are designed to work with Buffer Descriptors. This
allows a self-servicing buffer mechanism where a transmit channel will empty a
list of data buffers immediately after a receive channel fills those buffers, all
without host intervention. The value for the OWNER bit field in the transmit
buffer is opposite of the value of the OWNER bit field in the receive buffer
descriptor.
5-34
Conexant
100660E
CONEXANT [ CONEXANT SYSTEMS, INC ]
