5.0 Memory Organization
CN8478/CN8474A/CN8472A/CN8471A
5.1 Memory Architecture
Multichannel Synchronous Communications Controller (MUSYCC™)
Figure 5-1. Shared Memory Model Per Channel Group
Group Base Pointer
Transmit Message List
Buffer Descriptor
Channel Group Descriptor
Data Buffer Pointer
Data Buffer
Data Buffer
Tx Head Pointer – Ch 00
Tx Head Pointer – Ch.....
Tx Head Pointer – Ch 31
Next Message Pointer
Buffer Descriptor
Data Buffer Pointer
Next Message Pointer
Tx Message Pointer – Ch 00
Tx Message Pointer – Ch .....
Tx Message Pointer – Ch 31
Buffer Descriptor
Data Buffer Pointer
Next Message Pointer
Data Buffer
Rx Head Pointer – Ch 00
Rx Head Pointer – Ch ....
Rx Head Pointer – Ch 31
Receive Message List
Rx Message Pointer – Ch 00
Rx Message Pointer – Ch ....
Rx Message Pointer – Ch 31
Buffer Descriptor
Data Buffer Pointer
Next Message Pointer
Data Buffer
Data Buffer
Tx Time Slot Map
Tx Subchannel Map
Tx Channel Config Table
Buffer Descriptor
Data Buffer Pointer
Next Message Pointer
Rx Time Slot Map
Rx Subchannel Map
Rx Channel Config Table
Buffer Descriptor
Data Buffer Pointer
Next Message Pointer
Data Buffer
Global Configuration
Interrupt Queue
* See Table 5-19 for structure of Message Descriptor.
Group Configuration
Memory Protection
Message Length
Port Configuration
8478_021
5-2
Conexant
100660E