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CN8472AEPF 参数 Datasheet PDF下载

CN8472AEPF图片预览
型号: CN8472AEPF
PDF下载: 下载PDF文件 查看货源
内容描述: 多通道同步通信控制器( MUSYCC ™ ) [Multichannel Synchronous Communications Controller (MUSYCC?)]
分类和应用: 通信控制器
文件页数/大小: 221 页 / 2104 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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CN8478/CN8474A/CN8472A/CN8471A  
8.0 Terms, Definitions, and Conventions  
Multichannel Synchronous Communications Controller (MUSYCC™)  
8.6 Definitions  
8.6 Definitions  
bit field  
Any group of associated information bits that must always be viewed together to  
provide the desired information. For example, in a 3-bit field, the 3 bits can  
represent 8 related values and thus must always be viewed together.  
byte  
A field made up of 8 binary bits.  
channel  
A logical bit stream through MUSYCC. A channel has an associated transmit and  
receive direction. The transmit direction is for the bit stream flowing from shared  
memory towards the serial port. The receive direction is for the bit stream flowing  
from the serial port to the shared memory. A channel within MUSYCC is  
bidirectional. The rate of data flow is configurable and is specified in bits per  
second.  
channelized  
A serial port configuration whereby a higher speed bit stream is partitioned into  
lower speed bit streams or time slots. A frame synchronization signal is required  
and allows mapping of individual bits within the time slots into logical channels.  
This term is synonymous with PCM Highway.  
channel group  
data buffer  
MUSYCC is designed around four independent and full-duplexed sets of  
channels. Each channel group supports up to 32 logical channels.  
A block of shared memory where data messages are stored. As messages are  
received from the serial port, MUSYCC writes the message to shared memory  
data buffers. As messages are sent out on the serial port, MUSYCC takes  
messages from shared memory data buffers.  
descriptor  
dword  
A data structure used to specify attributes of a separate block of data.  
A field consisting of 32 binary bits, or 2 words concatenated, or 4 bytes  
concatenated.  
FIFO  
A region of memory designed to facilitate the movement of bits of information in  
a first-in-first-out manner.  
flag  
As defined by HDLC protocol, an octet with the value 7Eh (01111110b).  
frame  
In the context of an HDLC bit stream, this term is synonymous with message and  
packet. In terms of a serial interface, a frame is a grouping of synchronous bits  
relative to a serial line clock and delimited by a synchronization signal. The frame  
structure is defined by the physical interface providing the framed data.  
hyperchannel  
idle code  
Concatenation of time slots into a single logical channel. The available bandwidth  
for such a logical channel is the sum of bandwidth of each time slot.  
An octet pattern used to fill the time between the closing flag of one message and the  
opening flag of the subsequent message. The following idles codes are supported:  
7Eh, FFh, and 00h.  
100660E  
Conexant  
8-7