1.0 Product Description
CN8223
1.4 ATM Cell Processing Functions
ATM Transmitter/Receiver with UTOPIA Interface
1.4 ATM Cell Processing Functions
Figure 1-3 illustrates the CN8223 cell processing block, which assembles
received octet data from the line framers into ATM cells. During transmit, this
block constructs ATM cells for the line transmitter circuits. The ATM cell
processing block can generate or receive either the 57-octet framed PLCPs or the
53-octet direct-mapped formats. Status indications include 16-bit counters for
PLCP OOF or Loss-of-Cell (LOC) delineation events, framing-octet errors, and
BIP-8 code violations for both the near and far end. All alarm indications are
provided and can be programmed to generate interrupts.
Figure 1-3. CN8223 Cell Processing Block
Tx Cell
Transmit G.832
and PLCP
Framer
Generation,
Tx Rate
and Priority
Line Framers
Block
FIFO/UTOPIA
Ports Block
Rx Cell
Validation
Rx VPI/VCI
Screening
Receive G.832
and PLCP
Framer
CN8223 cell processing block features include the following:
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Selectable HEC or PLCP alignment
HEC calculation for ATM or SMDS
HEC correction
HEC Coset generation
PLCP overhead control
PLCP events and alarms control
AAL3/4 CRC and length check support
SONET scrambling
ATM payload scrambling
Error insertion
1-8
Conexant
100046C
CONEXANT [ CONEXANT SYSTEMS, INC ]
