Bt860/861
5.0 Serial Programming Interface and Registers
5.2 Internal Registers
Multiport YCrCb to NTSC/PAL /SECAM
Table 5-2. Register Bit Map (2 of 4)
Sub
addr
Default
Values(1)
D7
D6
D5
D4
D3
D2
D1
D0
15
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
0F
10
10
3F
80
80
00
C1
01
E5
75
C1
89
9A
80
80
80
1F
7C
F0
PLL_FRACT [18:16]
SC_RESET VSYNC_DUR 625LINE
PLL_INT[4:0]
SETUP
PAL
FM
DCHROMA ECBAR
EN_DAC_F EN_DAC_E EN_DAC_D EN_DAC_C EN_DAC_B EN_DAC_A
HSYNCI FIELDI BLANKI BLK_IGNORE PCLK_EDGE FLDMODE
OVRLAY_SEL VIDEO_SEL EN_656 PROG_SC SC_PATTERN
CVBSD_INV PKFIL_SEL[1:0] AUTO_CHK CHECK_STAT SLEEP
VIDFIELDI VIDVALIDI XL_LOCK
NI
SLAVE
CHROMA_BW
BLUE_FLD OUTMODE[2:0]
ECLIP
YDELAY[2:1]
PCLK_SEL VSYNCI
BLENDMODE ALPHAMODE[1:0]
SRESET
XL_VRI
FIELD_ID
LC_RST
LOCK
VIDVACTI
VIDHACTI
BY_PLL
DIS_XTAL
DIS_SCADJ SYNC_CFG DIS_PLL
CLKO_DIS EACTIVE
CROSSFILT
SYNC_AMP[7:0]
BURST_AMP[7:0]
M_CR[7:0]
M_CB[7:0]
M_Y[7:0]
M_COMP_D[7:0]
M_COMP_F[7:0]
M_COMP_E[7:0]
M_SC_DR[7:0]
M_SC_DR[15:8]
M_SC_DR[23:16]
M_SC_DR[31:24]
M_SC_DB[7:0]
M_SC_DB[15:8]
M_SC_DB[23:16]
M_SC_DB[31:24]
SC_AMP[7:0]
DR_MAX[7:0]
Reserved(4)
21
13
DA
4B
28
85
A3
05
9F
04
A3
05
9F
DR_MAX[10:8]
DR_MIN[10:8]
DB_MAX[10:8]
DR_MIN[7:0]
Reserved(4)
DB_MAX[7:0]
Reserved(4)
DB_MIN[7:0]
D860DSA
Conexant
5-5
CONEXANT [ CONEXANT SYSTEMS, INC ]
