Bt860/861
Multiport YCrCb to NTSC/PAL /SECAM
3
Table 3-4. Register Programming Values for SECAM
System Clock Frequency
(MHz)
Parameter Description
Register Name
Register Number
27
29.5
Number of Lines
625 Line
16[5]
1
1
Width of Analog Horizontal Sync Pulse
Cross Color Filtering Off
Upper Db Limit
AHSYNC_WIDTH
CR0SSFILT
DB_MAX
08[7:0]
7F
8B
ID[0]
0
0
34[1:0]/33[7:0]
36[1:0]/35[7:0]
30[1:0]/2F[7:0]
32[1:0]/31[7:0]
1B[6]
5A3
49F
5A3
49F
529
43B
529
43B
Lower Db Limit
DB_MIN
Upper Dr Limit
DR_MAX
DR_MIN
Lower Dr Limit
0(1)
1
0(1)
1
Bottleneck Pulses
FIELD_ID
FM Modulation
FM
16[2]
Number of Active Pixels per Line
HACTIVE
HBLANK
07[1:0]/06[7:0]
0C[1:0]/0B[7:0]
2C0
128
300
140
Number of System Clocks from O to
H
Active Video
Beginning of Subcarrier
Number of System Clocks Per Line
Cb Multiplier
HBURST_BEG
HCLOCK
M_CB
09[7:0]
97
6C0
A5
760
05[3:0]/04[7:0]
A2
94
9A
Cr Multiplier
M_CR
C5
B5
BB
Y Multiplier
M_Y
22[7:0]
A4
A4
Subcarrier Increment for Db
MSC_DB
2D[7:0]/2C[7:0]
2B[7:0]/2A[7:0]
284BDA13
24E1A08B
Subcarrier Increment for Dr
MSC_DR
29[7:0]/28[7:0]
27[7:0]/26[7:0]
29C71C72
263CBEEA
Interlace Off
NI
16[1]
0
0
0
0
Phase Alternation
PAL
16[3]
Programmable Subcarrier Mode
Subcarrier Amplitude
Subcarrier Phase Pattern
Setup
PROG_SC
SC_AMP
SC_PATTERN
SETUP
1A[1]
0
0
86
86
0
85
0
1A[0]
16[4]
0
0
Sync Tip to Blank Amplitude
SYNC_AMP
VACTIVE
VBLANK
1E[7:0]
0F[0]/0E[7:0]
0D[7:0]
F0
11F
17
F0
11F
17
Number of Active Lines
(2)
V
Number of Blanked Lines from O
Analog and Digital Vertical Sync Duration
VSYNC_DUR
16[6]
1
1
NOTE(S):
(1)
To enable synchronization bottleneck pulses, this bit must be 1.
Internal timing and the values programmed into the registers reference the analog VSYNC pulse (O ) as line #1 (see
(2)
V
Figures 3-1 and 3-2).
3-8
Conexant
D860DSA