2.0 Inputs and Timing
2.2 Digital Video Ports
Bt860/861
Multiport YCrCb to NTSC/PAL /SECAM
2.2.4 Overlay Modes and Alpha Blending
The Bt860/861 can be configured to display only a single video stream, or to mix
any combination of two data ports (P, VID, and OSD). Programming register field
ALPHAMODE (1A[6:5]) to 00 and register bit BLENDMODE (1A[7]) to 1
selects the internal video bus as the sole source of data, regardless of the alpha
source. In this mode, either the VID port or the P port can be used as the video
source, which is selected by register bit VIDEO_SEL (1A[3]). Other
combinations of the ALPHAMODE and BLENDMODE programming will allow
blending of the video and overlay buses. Table 2-1 lists all valid input modes.
Table 2-1. Alpha Blending Configurations
Configuration
Programming
VID
VID
VID
VID
VID
VID
VID
VID
VID
P
None
P
None
None
1 bit
2 bit
4 bit
2 bit
1 bit
2 bit
4 bit
2 bit
None
1 bit
2 bit
4 bit
2 bit
1
1
1
1
0
1
1
1
0
1
1
1
1
0
00
01
10
11
XX
01
10
11
XX
00
01
10
11
XX
1
1
1
1
1
1
1
1
1
0
0
0
0
0
X
0
0
0
0
1
1
1
1
X
1
1
1
1
No
Yes
Yes
No
ALPHA[1:0]
ALPHA[1:0]
ALPHA[1:0]
P LSBs
P
P
P
Yes
Yes
Yes
No
OSD
OSD
OSD
OSD
None
OSD
OSD
OSD
OSD
ALPHA[1:0]
ALPHA[1:0]
ALPHA[1:0]
OSD LSBs
None
Yes
No
P
ALPHA[1:0]
ALPHA[1:0]
ALPHA[1:0]
OSD LSBs
Yes
Yes
No
P
P
P
Yes
NOTE(S): X or XX = Don’t care.
Data from the overlay source may be applied with varying levels of
transparency, from fully transparent, no overlay, to fully opaque, full overlay. A
4-bit blend multiplier provides sixteen levels of mixing. The value 1111 is a
special case allowing the overlay data to pass completely unmixed. In all other
cases the value applied to the video path is (1 – blend / 16), and the value applied
to the overlay path is (blend / 16), where blend is the 4-bit multiplier value.
Two methods are used to generate the 4-bit multiplier. The multiplier value
can come either from a four-entry by 4-bit lookup table (LUT), or directly from
the ALPHA pins. In both cases, the blend multiplier value will be applied to both
luma and chroma for the co-sited components (Cb0:Y0:Cr0) and a separate
multiplier applied for the (Y1) component.
2-4
Conexant
D860DSA