2.0 Circuit Description
2.4 Receiver
Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
2.4.5 Alarm Monitor
The following signal alarms are detected in the RCVR: Loss of Frame (LOF);
Loss of Signal (LOS); Analog Loss of Signal (ALOS); Alarm Indication Signal
(AIS); Remote Alarm Indication (RAI) or Yellow Alarm (YEL); Multiframe
Yellow Alarm (MYEL); Severely Errored Frame (SEF); Change of Frame
Alignment (COFA); and Multiframe AIS (MAIS). Each alarm has the following:
a status register bit that reports the real-time status of the event, an interrupt
enable bit that enables an interrupt to mark the event, and an interrupt register bit
read by the interrupt service routine to identify the event that caused the interrupt.
All alarm status registers are reset on read unless the LATCH_ALM bit is set in
Alarm/Error/Counter Latch Configuration register [LATCH; addr 046].
LATCH_ALM enables the 1-second latching of alarms coincident with the
1-second timer interrupt [ISR6; addr 005]. With LATCH_ALM enabled, any
alarm detected during the 1-second interval is latched and held during the
following 1-second interval.
2.4.5.1 Loss of Frame
Receive Loss of Frame (RLOF) is declared when the receive data stream does not
meet the framing criteria specified in the Receiver Configuration register
[RCR0; addr 040].
If the line rate is E1 [T1/E1N; addr 001], RLOF is the logically OR'ed status
of FAS, MFAS, and CAS alignment. These alignments, FRED, MRED and
SRED, respectively, are available separately in the Alarm 3 Status register
[ALM3; addr 049]. Once RLOF is declared, the LOF[1:0] bits in ALM3 report
the reason for E1 loss of frame alignment. In T1 mode, RLOF is equal to FRED.
The RLOF real-time status is available in Alarm 1 Status register [ALM1;
addr 047], and the interrupt status is set in the Alarm 1 Interrupt Status register
[ISR7; addr 004]. The RLOF interrupt is enabled by setting RLOF in the Alarm 1
Interrupt Enable register [IER7; addr 00C].
An FRED count [FRED[3:0]; addr 05A] is also available in the
SEF/LOF/COFA Alarm Counter [AERR; addr 05A]. An interrupt in Counter
Overflow Interrupt Status [ISR4; addr 007] indicates that the FRED counter
overflowed. COFA [1:0] is applicable to T1 modes only.
While T1 framing mode is enabled, the RLOF status and RLOF interrupt
status are integrated over 2.0 to 2.5 seconds if the RLOF_INTEG bit is set in the
Receive Alarm Signal Configuration register [RALM; addr 045]. The FRED
count is unaffected by RLOF_INTEG.
2.4.5.2 Loss of Signal
If the line rate is T1, the criteria for Receive Loss of Signal (RLOS) is 100
contiguous 0s (consistent with the standard requirement of 175 ±75 zeros). If the
line rate is E1, the criteria for RLOS is 32 contiguous 0s. RLOS is cleared upon
detecting an average pulse density of at least 12.5% (occurring during a period of
114 bits starting with the receipt of a pulse, and where no occurrences of 100/32
contiguous 0s are detected).
The RLOS real-time status is available in ALM1, and the interrupt is available
in ISR7. The XMTR can be configured to automatically generate an Alarm
Indication Signal (AIS) in the transmit direction when RLOS is declared (see
AUTO_AIS [TALM; addr 075].
2-18
Conexant
N8370DSE
CONEXANT [ CONEXANT SYSTEMS, INC ]
