Bt8370/8375/8376
1.0 Pin Descriptions
1.1 Pin Assignments
Fully Integrated T1/E1 Framer and Line Interface
1.0 Pin Descr1iptions
1.1 Pin Assignments
Bt8370/8375/8376 is packaged in an 80-pin Metric Quad Flat Pack (MQFP). A
pinout diagram of this device is illustrated in Figure 1-1. Figure 1-2 details a
Bt8370/8375/8376 logic diagram. Pin labels, names, I/O functions, and
descriptions are provided in Table 1-1.
The input pins listed below contain an internal pullup resistor (>50 kΩ) and
can remain unconnected if the active-high input state is desired. All other unused
input pins should be either pulled up or grounded.
1
2
3
4
5
6
7
8
9
A[7:0]
XOE
Address lines unused in INTEL bus mode
Active-high enables analog bipolar output
MOTO* Pullup selects INTEL bus mode if unconnected
SYNCMD Pullup selects synchronous processor interface
RCKI
TDI
Receive clock unused if analog inputs enabled
Unused if JTAG not connected
TMS
TCK
RST*
Disables JTAG if not connected
Unused if JTAG not connected
Disables hardware reset if not connected
Unused if no external data link
10 TDLI
11 TSIGI
Unused if signaling data not supported by system
bus
N8370DSE
Conexant
1-1
CONEXANT [ CONEXANT SYSTEMS, INC ]
