Bt8370/8375/8376
2.0 Circuit Description
Fully Integrated T1/E1 Framer and Line Interface
2.9 Transmit Line Interface Unit
The VSET resistor not only provides a bias current to RPLL and TPLL but
also controls the height of the transmit pulse. The VSET value can be fine tuned
according to the total resistance on the line side. Table 2-23 shows the measured
Peak value of the transmit pulse. (Please refer to Figures 4-1 through 4-4 for the
recommended front-end circuitry.)
Table 2-23. Transmit Pulse
Rterm
VPk
2.36
2.96
2.36
2.30
2.28
75 Ω
100 Ω
LH =
2.96
SH =
3.16
LH =
2.96
SH =
3.12
LH =
2.88
SH =
3.00
LH =
2.80
SH =
3.04
120 Ω
2.96
No
2.90
One
2.84
Two
PTC
No
No
Tx Series
Resistance
2.1 Ω in series
with XTIP and
XRING
2.1 Ω in series
with XTIP and
XRING
2.1 Ω in series
with XTIP and
XRING
VSET (Ω)
14 k
51.1
14 k
51.1
14 k
51.1
14 k
51.1
Tx Termination
(Ω)
NOTE(S): LH refers to Long Haul, and SH refers to Short Haul.
The minimum series resistance required with XTIP/XRING is 2.1 Ω . The two
2.1 Ω series resistors, together with the Shottky diodes, are necessary to protect
the part against surge voltages of up to 50 V (please refer to Section 4,
Applications). The line side protection circuitry should break down the voltage to
50 V so that the chip side protection circuitry (two 2.1 Ω series resistors with
Shottky diodes) can protect the part for surge voltages of 50 V or below.
N8370DSE
Conexant
2-75