CN8223
3.0 Registers
ATM Transmitter/Receiver with UTOPIA Interface
3.7 Status Register Overview
0x3A—OVFL_STATUS (Counter Overflow Interrupt Status Register)
The OVFL_STATUS register is located at address 0x3A and indicates when particular counters have
overflowed. Error and Event Counters are described in Section 3.8.
Field
Size
Bit
15
Name
Counter 9 Line/PHY
Description
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Set when Line/PHY error counter 9 overflows.
Set when Line/PHY error counter 8 overflows.
Set when Line/PHY error counter 7 overflows.
Set when Line/PHY error counter 6 overflows.
Set when Line/PHY error counter 5 overflows.
Set when Line/PHY error counter 4 overflows.
Set when Line/PHY error counter 3 overflows.
Set when Line/PHY error counter 2 overflows.
Set when Line/PHY error counter 1 overflows.
Set when the IDLE_CELL_CNT counter overflows.
Set if the NON_MATCH_CNT counter overflows.
Set if the NON_ZERO_GFC counter overflows.
Set if the PAY_LEN_ERR counter overflows.
Set if the PAY_CRC_ERR counter overflows.
Set if the UNCOR_HEC_ERR counter overflows.
Set if the COR_HEC_ERR counter overflows.
14
13
12
11
10
9
Counter 8 Line/PHY
Counter 7 Line/PHY
Counter 6 Line/PHY
Counter 5 Line/PHY
Counter 4 Line/PHY
Counter 3 Line/PHY
Counter 2 Line/PHY
Counter 1 Line/PHY
Idle Cell
8
7
6
5
Non-matching Cells
Non-zero GFC
4
3
Payload Length Error
Payload CRC
2
1
HEC Error–Not Corrected
HEC Error–Corrected
0
100046C
Conexant
3-37
CONEXANT [ CONEXANT SYSTEMS, INC ]
