4-Level FSK Modem Data Pump
Page 6 of 50
MX929B PRELIMINARY INFORMATION
1. Block Diagram
DATA
QUALITY
REGISTER
STATUS
REGISTER
IRQ
8
D0
D1
D2
D3
COMMAND
REGISTER
MODE
REGISTER
CONTROL
DATA
BUS
REGISTER
D4
D5
D6
D7
BUFFERS
DATA
BUFFER
CRC
GENERATOR/
CHECKER
FEC
ENCODER/
DECODER
WR
RD
ADDRESS
AND
CS
A0
A1
R/W
DECODE
FRAME
SYNC DETECT
INTERLEAVE/
V
DD
DE-INTERLEAVE
V
DD
VBIAS
Tx Symbols
Rx Symbols
VSS
RXAMPOUT
DOC1
DOC2
Tx
Rx Input Amp
VBIAS
Rx LEVEL/CLOCK
EXTRACTION
Rx
Tx
RRC
Rx
RXIN
XTAL
LOW PASS
FILTER
RxEye
Rx
Tx
TXOUT
VBIAS
CLOCK
OSCILLATOR
AND
Tx Output Buffer
DIVIDERS
XTAL /
CLOCK
Figure 1: Block Diagram
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