GMSK Modem Data Pump
Page 15 of 37
MX909A PRELIMINARY INFORMATION
4.4.2.12 T7H - Transmit 7-byte Frame Head
This task takes 6 bytes of data from the Data Buffer, calculates and appends 8 bits of FEC from bytes '4' and
'5' then transmits the result as a complete Mobitex¥ Frame Head.
Bytes '0' and '1' form the bit sync pattern, bytes '2' and '3' form the frame sync pattern and bytes '4' and '5' are
the frame head control bytes. Bit 7 of byte '0' of the Data Buffer is sent first, bit 0 of the FEC byte last.
Once the modem has read the data bytes from the Data Buffer, the BFREE and IRQ bits of the Status
Register will be set to '1', indicating to the µC that it may write the next task and its data to the modem.
4.4.2.13 TQB - Transmit 4 Bytes
This task takes 4 bytes of data from the Data Buffer and transmits them, bit 7 first.
Once the modem has read the data bytes from the Data Buffer, the BFREE and IRQ bits of the Status
Register will be set to '1', indicating to the µC that it may write the next task and its data to the modem.
4.4.2.14 TDB - Transmit Data Block
This task takes 18 bytes of data from the Data Buffer, calculates and applies a 16-bit CRC and forms the FEC
for the 18 data bytes and the CRC. This data is then interleaved and passed through the scrambler, if
enabled, before being transmitted as a Mobitex¥ Data Block.
Once the modem has read the data bytes from the Data Buffer, the BFREE and IRQ bits of the Status
Register will be set to '1', indicating to the µC that it may write the next task and its data to the modem.
Note: In transmit mode the CRC checksum circuit is initialized on completion of any task other than NULL.
4.4.2.15 TSB - Transmit Single Byte
This task takes a byte from the Data Buffer and transmits the 8 bits, bit 7 first.
Once the modem has read the data byte from the Data Buffer, the BFREE and IRQ bits of the Status Register
will be set to '1', indicating to the µC that it may write the next task and its data to the modem.
4.4.2.16 TSO - Transmit Scrambler Output
This task, intended for channel set-up, enables the scrambler and transmits its output.
When the modem has started the task, the Status Register bits will not be changed and an IRQ will not be
raised. The µC may write the next task and its data to the modem at any time and the scrambler output will
stop when the new task has produced its first data.
4.4.2.17 RESET - Stop any current action
This task takes effect immediately, and terminates any current action (task, AQBC or AQLEV) the modem
may be performing and sets the BFREE bit of the Status Register to '1', without setting the IRQ bit. It should
be used when V is applied to set the modem into a known state.
DD
Note: Due to delays in the internal switched capacitor filter, it will take approximately 3 bit times for any
change to become apparent at the TXOUT pin.
4.4.2.18 Task Timings
The device should not be given a new task for at least 2 bit times after the following:
Changing from powersave state to normal operation.
Changing the Tx/Rx bit.
Resetting or after power is applied to the device.
This is to ensure that the internal operation of the device is initialized correctly for the new task.
Note: This only applies to the Command Register, other registers may be accessed as normal.
¤2001 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480134.005
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