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MX828DS 参数 Datasheet PDF下载

MX828DS图片预览
型号: MX828DS
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PDSO24, SSOP-24]
分类和应用: 电信光电二极管电信集成电路
文件页数/大小: 34 页 / 294 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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CTCSS/DCS/SelCall Processor  
12  
MX828 PRELIMINARY INFORMATION  
4.4.4 DCS BYTE 3 Register (Hex address $85)  
4.4.5 DCS BYTE 2 Register (Hex address $86)  
4.4.6 DCS BYTE 1 Register (Hex address $87)  
These three bytes set the code that is transmitted or received in the DCS mode. The LSB bit "0" of the DCS BYTE 1 is  
transmitted first and the last bit is the MSB bit 23 of DCS BYTE 3 in the 24-bit mode or bit 22 in the 23-bit mode. See  
Table 22 or refer to the latest version of ANSI/TIA/EIA - 603 specification and programming documentation for DCS  
standard 23-bit codes.  
4.4.7 GENERAL CONTROL Register (Hex address $88)  
This register is used to control the functions of the device as described below:  
When this bit is "1" the audio band-pass filter is enabled. When this bit is "0" the audio  
band-pass filter is disabled (powersaved).  
BPF ENABLE  
(Bit 7)  
When this bit is "1" the audio band-pass filter output is switched to the RX AUDIO OUT  
pin. When this bit is "0" the output of the filter is disconnected from RX AUDIO OUT,  
which is then in a high impedance state.  
BPF UN-MUTE  
(Bit 6)  
This control, along with BPF ENABLE, allows the filter to power up and settle internally  
before switching the output on, to avoid clicks when coming out of powersave.  
When this bit is "1" a 6dB attenuator is inserted into the output of the audio band-pass  
filter. When this bit is "0" the output of the audio band-pass filter is not attenuated.  
BPF 6dB PAD  
(Bit 5)  
These three bits set the level of the digital to analogue converter that feeds the negative  
input of the comparator. The DAC can be set to one of eight levels equally spaced  
between VSS and VBIAS, not including VSS, but including VBIAS, i.e. with a 5V supply, the  
lowest level would be 312.5mV set by "000" in bits 2, 3 and 4 and the highest level would  
be 2.5V set by "111" in bits 2, 3 and 4.  
DAC  
(Bits 4, 3 and 2)  
When this bit goes to a "1" the general purpose timer is restarted and its internal register is  
re-loaded from the value specified in the GENERAL PURPOSE TIMER Register (Hex  
address $8B). It will then count down from the count held in its internal register. When  
this bit is "0" the count down is disabled and the last pre-programmed value is retained in  
the timer's internal register.  
TIMER ENABLE  
(Bit 1)  
When this bit is "1" the general purpose timer will re-load its internal register from the  
value specified in the GENERAL PURPOSE TIMER Register (Hex Address $8B) when the  
count in the internal register reaches zero (i.e. the timeout has expired). It then restarts the  
count down, so that the timer continuously cycles.  
TIMER RE-CYCLE  
(Bit 0)  
When this bit is "0" the general purpose timer will stop when the count in the internal  
register reaches zero (i.e. the timeout has expired). The timer can only be restarted by  
reloading a value into the GENERAL PURPOSE TIMER Register (Hex address $8B).  
If this bit is switched from "1" to "0" while the timer is enabled then the timer will complete  
the present count before stopping.  
Table 11: GENERAL CONTROL Register (Hex address $88)  
© 1997 MXCOM Inc.  
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054  
Doc. # 20480161.002  
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA  
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