Audio Signaling Processor
Page 10 of 26
MX803A PRELIMINARY INFORMATION
5.2.1 Write to Control Register
A/C 30H, followed by 1 byte of Command Data
Enables or Disables the stand-alone on-chip Audio Switch.
Audio Switch:
This should be set up before interrupts are enabled since a General
Reset command will set the timer period to 00H - 0ms (permanent
interrupt).
General Purpose Timer:
Status bits 0, 1 and 2 are produced regardless of the state of these
settings.
Interrupt Enable Instructions:
Bits 2 and 3 set the required frequency range. See Figure 4.
Used to Enable or Disable the switch that controls the MX803A output.
Decoder Interrupts
Band Selection:
Summing Switch:
Interrupt Designation:
Notone Timer and RX Tone Measurement
Transmitter Interrupt
G/Purpose Timer Interrupt
Setting
MSB
Control Bits
Transmitted First
Audio switch
Enable
Bit 7
1
0
Disable
Bit 6
G/Purpose Timer Interrupt
Enable
1
0
Disable
Bit 5
Decoder Interrupts
Enable
1
0
Disable
Bit 4
Summing Switch
Enable
1
0
Bit 3
0
Disable
Bit 2
Band Selection
High Band
Mid Band
0
1
0
1
0
1
Extended Band
Do not use this setting
Set to
1
Bit 1
0
0
Bit 0
0
Set to
0
Table 4: Control Register
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