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MX803ALH 参数 Datasheet PDF下载

MX803ALH图片预览
型号: MX803ALH
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, CMOS, PQCC24, PLASTIC, LCC-24]
分类和应用: 电信电信集成电路
文件页数/大小: 27 页 / 308 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Audio Signaling Processor
Page 4 of 26
MX803A PRELIMINARY INFORMATION
2. Signal List
Pin No.
1
2
3
Name
XTAL
Type
Description
Output Output of the on-chip clock oscillator. External components are required
at this output when a Xtal is used. See Figure 2.
Input
Input to the on-chip clock oscillator inverter. A Xtal or externally derived
clock should be connected here. See Figure 2.
Xtal/Clock
Reply Data
Output C-BUS serial data output to the
µC.
The transmission of Reply Data
bytes is synchronized to the Serial Clock under the control of the Chip
Select input. This 3-state output is held at high impedance when not
sending data to the
µC.
See Figure 8 and Figure 9.
Input
C-BUS data loading control function. This input is provided by the
µC.
Data transfer sequences are initiated, completed or aborted by the chip
select signal. See Figure 8 and Figure 9.
C-BUS serial data input from the
µC.
Data is loaded to this device in 8-bit
bytes, MSB (B7) first and LSB (B0) last, synchronized to the Serial Clock.
See Figure 8 and Figure 9.
This “real-time” input is available as a general purpose logic input port
which can be read from the Status Register. See Table 5.
G/Purpose Timer Period Expired
NOTONE Timer Period Expired
RX Tone Measurement Complete
These interrupts are inactive during relevant powersave conditions and
can be disabled by bits 5 and 6 in the Control Register.
4
CS
5
Command Data
Input
6
Logic Input
Input
7
IRQ
Output Output of this pin indicates an interrupt condition to the
µC
by going to a
logic “0.” This is a “wire-or-able” output, allowing the connection of up to
8 peripherals to 1 interrupt port on the
µC.
This pin has a low impedance
pulldown to logic “0” when active and a high impedance when inactive.
The system IRQ line requires one pullup resistor to V
DD
. The conditions
that cause interrupts are indicated in the Status Register and are shown
below:
Input
Input to the stand-alone on-chip Audio Switch. This function is
enabled/disabled by Bit 7 of the Control Register
10
11
12
13
Audio Switch In
Audio Switch
Out
V
SS
Rx Audio In
Output Output of the stand-alone on-chip Audio Switch..
Power Negative supply (GND).
Input
Received audio tone signaling input. This input must be ac coupled and
connected, using external components, to the Signal Input Bias pin.
See Figure 2.
External components are required between this input and the RX Audio In
pin. See Figure 2.
14
15
16
Signal Input
Bias
V
BIAS
Tone 1 Out
Input
Output Internal circuitry bias signal, held at V
DD
/2. This pin should be decoupled
to V
SS
by capacitor C2. See Figure 2..
Output Tone 1 Generator (2-/5-tone Selcall or DTMF 1) output. External gain
and coupling components are required at this output when operating in a
complete DBS 800 audio installation. The frequency of this output is
determined by writing to the TX Tone Generator 1 Register (Table 7).
See Figure 2.
Output Tone 2 Generator (2-/5-tone Selcall, CUES or DTMF 2) output. External
gain and coupling components are required at this output when operating
in a complete DBS 800 audio installation. The frequency of this output is
determined by writing to the TX Tone Generator 2 Register (Table 7).
See Figure 2.
17
Tone 2 Out
©2001 MX•COM, INC.
www.mxcom.com
Tele: 800 638 5577 336 744 5050
Fax: 336 744 5054
Doc. # 20480122.005
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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