Variable Split Band Inverter
3
MX214/224
1.
Block Diagram
POWERSAVE
XTAL / CLOCK
XTAL
LOAD / LATCH
SERIAL CLOCK
ENABLE / MUTE
1MHz
OSC
INPUT LATCHES
EN / MUTE
CLEAR / SCRAMBLE
CLEAR / SCRAMBLE
Rx / Tx (SER / PAR)
1MHz
Rx / Tx
A0
V
A1
A2
A3
A4
DD
CLOCK
DIVIDER
CLOCK
DIVIDER
ROM
V
BIAS
V
SS
CK
B
CK
B
PS
CK
A
F
F
CLOCK
SWITCHING
C1 C2
Rx / Tx
(SERIAL DATA IN)
CK
3
CK4
CK
B
PS EN Tx
EN PS Rx
Rx
Rx
Rx IN
Tx OUT
PS + EN Tx
CTCSS
CK
3
Rx
PS
MUTE
F
C2
BIAS
BIAS
BIAS
Tx
C
5
SCRAMBLE
FILTER 3
FILTER 4
CK
PS MUTE Rx
Rx OUT
Tx PS
Tx PS
4
Σ
F
C1
Rx
Rx
Tx
Tx
Rx
BIAS
CK
4
Tx IN
CLEAR
FILTER 1
FILTER 2
CK
Tx
PS
A
BIAS
BIAS
BIAS
CK
A
PS + EN Rx
C6
Figure 1: Block Diagram
ꢀ1998 MX-COM, Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480112.002
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