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MX105ALH 参数 Datasheet PDF下载

MX105ALH图片预览
型号: MX105ALH
PDF下载: 下载PDF文件 查看货源
内容描述: 音频检测器 [Tone Detector]
分类和应用:
文件页数/大小: 15 页 / 157 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Tone Detector
6
MX105A PRELIMINARY INFORMATION
4. General Description
The MX105A implements a frequency detector with a phase locked loop (PLL) and a lock detector. The voltage controlled
oscillator (VCO) center frequency, detection bandwidth, loop filter, and detect filter are all independently controlled by
external components.
The MX105A provides a pair of pseudo-sinewave multipliers for splitting the input signal into approximately orthogonal
components. These multipliers are implemented with commutating filters (cyclically sampling filters) which translate an in
band AC input signal to DC. The commutating loop filter is used as the phase detector of the PLL while the commutating
detect filter provides for lock detection. Each pseudo-sinewave has a cyclic form (1 1 0 -1 -1 0) to eliminate low order
harmonic responses. The loop filter produces an error signal, which when applied to the VCO input allows frequency
locking. A limiter between the loop filter output and the VCO input provides tunable control of the detection bandwidth
(BW). Once lock is achieved the detect filter produces a DC value proportional to the input tone amplitude. An internally
generated reference is compared to the detect filter output to determine whether the PLL is locked to an input tone. Once
lock is determined the internal reference is reduced by 50% to minimize output chatter with marginal input signals.
The sampling clocks of the detect filter lag those of the loop filter by 60°. To improve performance, a capacitor (C4) can
be used to phase shift the input to the loop filter by 30°. This shifts all sampling clocks an additional 30° relative to the
input tone to phase align the detect filter sampling clocks with the amplitude peaks of the input tone.
Figure 3 shows the sampling clocks relative to an in band input tone; this figure represents the steady state ‘locked’
condition without C4.
Internal Clock
Segment
4
5
6
1
2
3
4
5
6
1
2
3
4
5
6
1
2
3
Input Tone
Logic 1
indicates
sampling
period
C2
B
C2
A
C3
A
C3
B
Figure 3: Sampling Clocks of Commutating Filters
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480133.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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