FRS Signalling Processor
CMX882
1.4
External Components
VDD(D)
NC
NC
NC
R1
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
2
IRQN
VSS(D)
CLOCK_OUT
CLOCK/XTAL
VDD(D)
AUDIO
3
X1
REPLY_DATA
VSS(D)
4
C-BUS
Interface
5
VSS(D)
SERIAL_CLOCK
CMD_DATA
CSN
6
C2
CMX882
R2
Loudspeaker amp
7
VSS(A)
Discriminator
8
VSS(A)
MOD_2
MOD_1
VDD(A)
SIG_MONITOR
MIC_FB
MIC
R3
R4
Modulator reference
Modulator control
9
C8
VBIAS
C5
R6
R5
10
11
12
13
14
DISC
C1
C3
C4
DISC_FB
INPUT_2
INPUT_2_FB
VSS(A)
C7
R8
C9*
D1* R10*
R9*
C10*
C6
R7
Microphone
VSS(A)
Figure 2 Recommended External Components
R1 100kΩ
R2 100kΩ
R3 100kΩ
R4 100kΩ
R9 See note 6
C6 See note 4
R10 See note 6
C7 200pF
C8 See note 4
C9/10 See note 6
C1 100pF
C2 1nF
R5 See note 2
R6 100kΩ
C3 100pF
C4 100pF
C5 100pF
X1 18.432MHz
D1 See note 6
See note 1
R7 See note 3
R8 100kΩ
Resistors ±5%, capacitors and inductors ±20% unless otherwise stated.
Notes:
1. X1 can be a crystal or an external clock generator; this will depend on the application. The clock
drift requirement is defined in section 1.8.1. The tracks between the crystal and pin 24 and pin 5
should be as short as possible to achieve maximum stability and best start up performance.
2. R5 should be selected to provide the desired dc gain (assuming C8 is not present) of the
discriminator input, as follows:
GAINDisc = 100kΩ / R5
The gain should be such that the resultant output at the DISC_FB pin is within the discriminator input
signal range specified in section 1.8.1.
3. R7 should be selected to provide the desired dc gain (assuming C6 is not present) of the microphone
input as follows:
GAINMic = 100kΩ / R7
The gain should be such that the resultant output at the MIC_FB pin is within the microphone input
signal range specified in section 1.8.1.
4. C6 and C8 should be selected to maintain the lower frequency roll-off of the microphone and
discriminator inputs as follows:
C6 = 30nF × GAINMic
C8 = 100nF × GAINDisc
and C6 > 1000µF / R7
and C8 > TBAµF / R5
2004 CML Microsystems Plc
11
D/882/7
CMLMICRO [ CML MICROCIRCUITS ]
