Analogue Control Interface
FX839
Notes
Min.
Typ.
Max.
Units
ADCs and Multiplexed Inputs
(Guaranteed monotonic)
Resolution
10
Bits
Input signal 'linear rate of change'
0.27
mV/µs
V
DD
= 3.3V, f
= (For 1 Bit error)
adc_clk
Conversion Time f
= 1MHz
adc_clk
12
µs
LSBs
LSBs
mV
Integral non-linearity
Differential non-linearity
Zero error
2.0
1.0
20
-20
ADC Clock Frequency (f
Input Capacitance
)
1.0
TBD
TBD
MHz
pF
adc_clk
Variable Attenuators
Nominal Adjustment Range (MOD1)
(MOD2)
Attenuation Accuracy
0
0
-1.0
0.2
0.1
12.0
6.0
1.0
0.6
0.3
dB
dB
dB
dB
dB
Ω
Step Size
(MOD1)
(MOD2)
0.4
0.2
600
100
15.0
Output Impedance
Bandwidth (-3dB)
Input Impedance (at 100Hz)
2
2
kHz
kΩ
Magnitude Comparators and Interrupt
Request
Resolution
8
Bits
Output Logic '0' at IRQN (I = 360µA and
10%
10
DV
DD
OL
R2 = 22kΩ ± 10% to DV
)
DD
'Off' State Leakage Current at IRQN
(Vout = DV
µA
)
DD
Xtal/Clock Input
Frequency Range
'High' pulse width
'Low' pulse width
4
0.5
40
40
6.0
MHz
ns
ns
Input Impedance (at 100Hz)
Gain (I/P = 1mVrms at 100Hz)
10
20
MΩ
dB
Notes: 1. The extremes of the DAC output range, when resistively loaded, are affected by the output
impedance of the DAC buffer. Under these conditions the output impedance can approach
200Ω. However, when the output is operating well within the supply, the closed loop output
impedance will be significantly lower thereby improving the loaded performance.
2. Small signal impedance, at AV = 5V and Tamb = 25°C.
DD
Consumer Microcircuits Limited
18
1997
D/839/4