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FX809LG 参数 Datasheet PDF下载

FX809LG图片预览
型号: FX809LG
PDF下载: 下载PDF文件 查看货源
内容描述: FFSK调制解调器 [FFSK Modem]
分类和应用: 调制解调器
文件页数/大小: 15 页 / 416 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Pin Number Function  
FX809  
J/LG/LS  
1
2
3
Xtal: The output of the on-chip clock oscillator. External components are required at this input  
when a Xtal input is used. See Figure 2, INSET.  
Xtal/Clock: The input to the on-chip clock oscillator inverter. A Xtal or externally derived clock  
should be connected here. See Figure 2, INSET.  
Interrupt Request (IRQ): The output of this pin indicates an interrupt condition to the  
µController, by going to a logic “0.” This is a “wire-or able” output, enabling the connection of  
up to 8 peripherals to 1 interrupt port on the µController. This pin has a low-impedance  
pulldown to logic “0” when active and a high-impedance when inactive. The system IRQ line  
requires a 'pull-up' resistor to VDD.  
The conditions that cause interrupts are indicated in the Status Register and are shown below:  
Tx Idle  
Rx Data Ready  
Tx Data Ready  
Rx SYNC Detect  
Rx SYNC Detect  
Interrupt outputs can be disabled by bit 3 of the Control Register.  
No Internal connection.  
4
5
6
No Internal connection.  
Rx Freeformat: Used in the Rx mode, this input, when a logic “0,” allows received data to be  
read from the Rx Data Buffer via the Reply Data line without having to acheive byte  
synchronization (SYNC/SYNC) first. Data will continue to be available after this input goes to a  
logic “1” until either a SYNC or SYNC Prime bit is set or the the modem set to Tx mode.  
When held at a logic “1” the modem operates normally. This pin has an internal 1Mpullup  
resistor.  
NOTE: If this input is held at a logic “0” in the Tx mode, the Rx Data Ready bit in the Status  
Register may occasionally be set, but not cause an interrupt. If this input is a logic “0” when  
going into the Rx mode, an Rx Data Ready interrupt may be generated immediately, in this  
case the first byte of Rx data should be ignored.  
VBIAS : The internal circuitry bias line, held at VDD/2 this pin must be decoupled to VSS by  
capacitor C3, see Figure 2.  
7
Amp In: The inverting input to the on-chip uncommitted amplifier .  
Amp Out: The output of the on-chip uncommitted amplifier.  
8
9
Rx In: The 1200 baud, 1200Hz/1800Hz, received FFSK signal input. The input signal to this  
pin must be a.c. coupled via capacitor C4, see Figure 2.  
10  
No Internal connection.  
11  
12  
VSS: Negative Supply (GND).  
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