Controlling Protocol ......
“Read Status Register”
– A/C 71
H
(79
H
), followed by 1 byte of Reply Data.
The Status Register indicates the operational condition of the FX805. Bits 0 to 5 are set individually to indicate specific
actions within the device. When a Status Bit is set to a logic “1,” an Interrupt Request (IRQ) output is generated. A read of the
Status Register will reset the interrupt condition and ascertain the state of this register.
Table 4 (below) shows the conditions indicated by the Status Bits.
Status Bit
MSB
7,6
5
Set By
Received First
Not used
NRZ data transmission
complete. No new data loaded.
Logic
Cleared By
Logic
“0”
“1”
1.
2.
3.
1.
2.
3.
1.
2.
3.
1.
2.
3.
1.
2.
3.
1.
2.
3.
Not used
Write to NRZ Tx Data Reg. or,
General Reset or,
NRZ Encoder Powersave.
Write to NRZ Tx Data Reg. or,
General Reset or,
NRZ Tx Powersave.
Read NRZ Rx Data Reg. or,
General Reset or,
NRZ Decoder Powersave.
Read NRZ Rx Data Reg. or,
General Reset or,
NRZ Decoder Powersave.
Read Status Register or,
General Reset or,
CTCSS Decoder Powersave.
Read Status Register or,
General Reset or,
CTCSS Decoder Powersave.
“0”
“0”
4
NRZ Tx Data Buffer ready for
next data byte.
“1”
“0”
3
New NRZ Rx data received
before
last byte was read.
“1”
“0”
2
1 byte of NRZ Rx data
received.
“1”
“0”
1
N
OTONE
Timer period expired.
“1”
“0”
0
Rx Tone Measurement
complete.
“1”
“0”
Table 4 Status Register
“Read CTCSS Rx Frequency Register”
Measurement of CTCSS Rx Frequency (f
CTCSS IN
)
– A/C 72
H
(7A
H
), followed by 2 bytes of Reply Data.
When the measurement period of a successful decode
is complete, the Rx Tone Measurement bit in the Status
Register, and the Interrupt bit are set.
The CTCSS Rx Frequency Register will now indicate
the sub-audio signal frequency (f
CTCSS IN
) in the form of 2
data bytes (1 and 0) as illustrated in Figure 6.
The input sub-audio signal (f
CTCSS IN
), is filtered and
measured in the Frequency Counter over the “measurement
period” (122.64ms).
The measuring function counts the number of complete
input cycles occurring within the measurement period and
then the number of measuring-clock cycles necessary to
make up the period.
Measurement Period
Complete
Input
Cycle
Complete
Input
Cycle
Complete
Input
Cycle
Complete
Input
Cycle
Complete Measuring
Clock
Input
Cycles
Cycle
FILTERED and DOUBLED SUB-AUDIO INPUT SIGNAL
2 x f
CTCSS IN
N
Fig.5 Measurement of a CTCSS Rx Frequency
8
R
CMLMICRO [ CML MICROCIRCUITS ]
