欢迎访问ic37.com |
会员登录 免费注册
发布采购

FX802J 参数 Datasheet PDF下载

FX802J图片预览
型号: FX802J
PDF下载: 下载PDF文件 查看货源
内容描述: DVSR CODEC [DVSR CODEC]
分类和应用: 解码器编解码器电信集成电路电信电路
文件页数/大小: 14 页 / 129 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号FX802J的Datasheet PDF文件第5页浏览型号FX802J的Datasheet PDF文件第6页浏览型号FX802J的Datasheet PDF文件第7页浏览型号FX802J的Datasheet PDF文件第8页浏览型号FX802J的Datasheet PDF文件第10页浏览型号FX802J的Datasheet PDF文件第11页浏览型号FX802J的Datasheet PDF文件第12页浏览型号FX802J的Datasheet PDF文件第13页  
Encoder and Decoder Control
Analogue Input and Output Switching
The Control Register, Byte 0 – bits 0 to 5, are used, in conjunction with the codec Powersave Bit (Byte 1 – bit 3) to control codec
input/output conditions and sample rates. Figure 3 shows the codec functional situation.
AUDIO IN
MOD
DEMOD
AUDIO OUT
CVSD Codec
INPUT
BIAS
200k
(nom)
V
BIAS
AUDIO
BYPASS
V
BIAS
500k
(nom)
OUTPUT
BIAS
Fig.3 Analogue Control – with reference to Fig.1
Control Register
Codec
Decoder
Powersave
Control
Bit
“5”
“4”
0
0
0
0
0
0
0
0
1
0
0
1
0
1
1
1
0
0
1
0
0
1
0
1
1
0
1
1
1
1
Encoder
Control
“2”
“1”
0
0
0
0
0
0
0
0
1
0
0
1
0
1
1
1
0
0
1
1
1
Circuit Switches
Audio
By-Pass
OFF
ON
OFF
OFF
OFF
OFF
ON
OFF
OFF
OFF
“3”
0
1
0
1
1
0
1
0
1
1
Audio
Out
ON
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
Output
Bias
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
ON
ON
OFF
ON
=
=
Switch Open
Switch Closed
Note
Decoder ‘idling’ fed with “1010101
....” pattern at 32kb/s.
Decoder running at the selected
sampling rate.
1
1
Decoder circuits Powersaved
“0”
0
1
0
1
1
0
1
Input
Bias
ON
OFF
OFF
OFF
OFF
ON
2
Encoder running at 32kb/s but
Encoder Data Output forced to ‘idle’
pattern “01010 ...”
Encoder running at selected
Sampling Rate
ON
Encoder circuits Powersaved
Table 5 Analogue Control – with reference to Fig.3
Notes
1.
If the Delta Codec is in the Direct Access mode, these
sampling rates will be as provided by the externally
applied clock.
2.
The Input Bias switch is operated by the Control Register
Codec Powersave’ and ‘Encoder Control’ bits to provide a
relatively low impedance path for V
BIAS
to charge the input
coupling capacitor whenever the codec is powersaved, or the
Encoder control bits are set to “0,” so that input bias can be
established quickly prior to operation.
Time Compression of Speech
The 25kb/s and 50kb/s sampling rate options are provided
for time compression (and subsequent expansion) of speech
signals.
For example, 1.0 second of speech stored at 50kb/s may
be transmitted in 0.8 seconds if played out at 64kb/s, and
finally restored to its original speed at the receiver by storing
9
at 64kb/s and playing out at 50kb/s. A similar result (with a
degraded SINAD) may be achieved by using 25kb/s and
32kb/s sampling rates.
However, the speech frequencies are raised by time
compression, and since the signal transmitted to air must be
band limited to 3400Hz, the effective end-to-end bandwidth
is 0.8 x 3400Hz, which is approximately 2700Hz.