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FX663D4 参数 Datasheet PDF下载

FX663D4图片预览
型号: FX663D4
PDF下载: 下载PDF文件 查看货源
内容描述: 呼叫进展解码器 [Call Progress Decoder]
分类和应用: 解码器
文件页数/大小: 17 页 / 300 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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Minimum Input Signal: The minimum signal level for the specified tone decoding performance. The lower  
level at which absence of an input signal will be registered is not specified. However, a separate level detector  
makes amplitude information available.  
No Signal: A signal falling outside the nominal range 180Hz to 2280Hz or the absence of an input signal.  
Either will be detected as a No Signal condition.  
Nominal: Subject to dynamic tolerances within the signal analysis process. Absolute values are not material  
or adverse to performance.  
1.5.3 Block Diagram Description (Reference Figure 1)  
Amplifier  
The input signal is amplified by a self-biased inverting amplifier. The dc bias of this input is internally set at  
½VDD. The analyser samples the call progress signal at 9.3kHz.  
Call Progress Detector: Signal Analyser  
The frequency range, quality and consistency of the input signal is analysed by this functional block. To be  
classified as a call progress signal the input signal frequencies should lie between 340Hz and 700Hz, the  
signal to noise ratio must be 16dB or greater and the signal must be consistent over a period of at least  
145ms. These decode criteria are continuously monitored and the assessment is updated every 7ms.  
620Hz Detector  
The detector is designed to aid detection of "US Busy" tone. The bandwidth of the 620Hz Detector is 60Hz  
and the signal must be consistent over a period of at least 145ms for detection to occur. This assessment is  
updated every 55ms.  
Control and Output Logic  
This block categorises the nature of the signal into various decoded output states and controls the four  
outputs. See the Truth Table in section 1.5.4.  
Level Detector and OPAMP  
The OPAMP is configured as an amplifier with external components R1, R2, C4 and C5. The level detector  
operates by measuring the level of the amplified input signal and comparing it with a preset threshold which is  
defined inside the FX663 as shown in the detect equation.  
The detector output goes to the Control and Output Logic block. The data output is gated with the level  
detector's output. The data output is valid only if the level detector output is true. The level detector output can  
be forced true by connecting AMPNINV to VBIAS and connecting AMPINV to VSS through a 100kW resistor.  
An interrupt is produced if the output data changes state.  
The detect equation is:  
For detect level  
where gain = -R2/R1.  
Gain x input signal level > 250 mVp-p  
This amplifier may be used to buffer, unbalance or amplify line signals if required.  
Xtal/Clock Oscillator  
If the on-chip Xtal oscillator is to be used, then external components X1, R1, C1 and C2 are required. If an  
external clock source is to be used, then it should be connected to the XTAL/CLOCK input pin and the XTALN  
pin should be left unconnected.  
ã 1999 Consumer Microcircuits Limited  
8
D/663/3  
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