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FX604P3 参数 Datasheet PDF下载

FX604P3图片预览
型号: FX604P3
PDF下载: 下载PDF文件 查看货源
内容描述: [Modem, 1.2kbps Data, CMOS, PDIP16, DIP-16]
分类和应用: 电信光电二极管电信集成电路
文件页数/大小: 17 页 / 344 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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V.23 Compatible Modem
FX604
1.5.2
Mode Control Logic
The FX604's operating mode is determined by the logic levels applied to the M0 and M1 input pins:
M1
0
0
1
1
M0
0
1
0
1
[1] If enabled.
In the 'Zero-Power' mode, power is removed from all internal circuitry. When leaving 'Zero-Power' mode there
must be a delay of 20ms before any Tx data is passed to, or Rx data read from, the device to allow the bias
level, filters and oscillator to stabilise. On applying power to the device the mode must be set to 'ZP', i.e.
M0=1, M1=1, until V
DD
has stabilised.
1.5.3
Rx Input Amplifier
Rx Mode
1200bits/sec
off
1200bits/sec
'Zero-Power'
Tx Mode
75bits/sec
1200bits/sec
off
Data Retime
[1]
Rx
Tx
Rx
-
This amplifier is used to adjust the signal received to the correct amplitude for the FSK receiver and Energy
Detect circuits (see section 1.6.1).
1.5.4
Receive Filter and Equaliser
Is used to attenuate out of band noise and interfering signals, especially the locally generated 75bits/sec
transmit tones which might otherwise reach the 1200bits/sec FSK Demodulator and Energy Detector circuits.
This block also includes a switchable equaliser section. When the RXEQ pin is low the overall group delay of
the receive filter is flat over the 1200bits/sec frequency range. If the RXEQ pin is high the receive filter's typical
overall group delay will be as shown in Figure 3.
Figure 3 Rx Equaliser Group Delay (RXEQ = '1') with respect to 1700Hz
©
1996 Consumer Microcircuits Limited
6
D/604/3