Half Duplex GMSK Modem
FX579
Tx/Rx Switching
(Refer to Figure 8)
Rx to Tx Transition - following a "0" to "1" transition on the TXRXN input:
a)
If DATACLK is at a logic "1" it will go to a logic "0" (t1 max = 1µs), or if at logic "0" will stay low.
It will then remain at "0" for a minimum of 2 bit times, maximum of 3 bit times, before the first
+ve transmit clock edge occurs.
b)
The DATAIO line will go to a high impedance state ready for Tx data to be applied (t2 max =
1µs). Data on the DATAIO line should be set up and ready for when the first +ve transmit clock
edge occurs. This edge will clock the first bit of data into the transmit filter. Succeeding -ve
clock edges may be used by the µController to ensure that data is always set up when +ve
edges occur.
c)
TXOP is opened to the transmit path upon occurrence of the first +ve clock edge. Due to the
delay of the filter, the centre of Bit 1 will appear at the pin a maximum of 2 bit times (BT = 0.5)
or 2.5 bit times (BT = 0.3) later.
d)
e)
At the end of a message the transmit output will remain in the state of the last bit sent.
If a long period of unmodulated carrier is required before a message (approximately 10ms as
on MOBITEX), then the radio's transmitter should be keyed up with the FX579 modem still in
Rx mode.
Tx to Rx Transition - following a "1" to "0" transition on the TXRXN input:
a)
DATACLK continues at the nominal bit rate in a free-running mode until locked to a receive
signal, e.g. after a satisfactory ACQUIRE sequence.
b)
c)
d)
The buffer driving the TXOP pin is immediately connected to V
.
BIAS
The DATAIO line immediately goes low impedance and starts sending Rx data.
There is a 3-bit delay in the receive path before RXIN input data can appear at the DATAIO
pin.
ã 1996 Consumer Microcircuits Limited
16
D/579/4
CMLMICRO [ CML MICROCIRCUITS ]
